Two-dimensional semiconductors for future electronics

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dc.contributor.advisor Duffy, Ray en
dc.contributor.advisor Hurley, Paul K. en
dc.contributor.advisor Monaghan, Scott en
dc.contributor.author Mirabelli, Gioele
dc.date.accessioned 2020-06-19T10:10:36Z
dc.date.available 2020-06-19T10:10:36Z
dc.date.issued 2020
dc.date.submitted 2020
dc.identifier.citation Mirabelli, G. 2020. Two-dimensional semiconductors for future electronics. PhD Thesis, University College Cork. en
dc.identifier.endpage 170 en
dc.identifier.uri http://hdl.handle.net/10468/10151
dc.description.abstract The aggressive scaling imposed by CMOS technology has put very stringent requirements on the dimensions of Silicon transistors. According to the semiconductor roadmaps (ITRS, IRDS, Nereid), the dimensions of the device might have reached its limits in terms of gate length. Although new device architectures are being studied to keep the pace up with Moore-law, new material systems are still relevant to further improve the performance of integrated circuits. On this regard, 2D-semiconductors, as transition metal dichalcogenides (TMDs), are being considered as potential replacement for Silicon. Because of their intrinsic thin nature, they can guarantee a better channel control at similar channel length, without suffering from high mobility degradation as other 3D-semiconductors. In this dissertation, the limits and potentials of 2D-semiconductors are investigated by material analysis, electrical characterization and TCAD modeling. First, the air sensitivity of few TMDs is considered. An initial AFM study show high reactivity in HfSe2, with blisters growing up to 60 nm after one day from ambient exposure. These results are later confirmed by other techniques, showing a high detrimental effect on the semiconductor surface. The surface treatment or protection of these materials needs to be carefully studied for their use in the semiconductor industry. A second limitation of 2D-electron devices is their low mobility compared with theoretical studies. Material and electrical characterizations of 3-layers MoS2 transistors show a high impurity concentration, which drastically limits the field-effect mobility and so device performance. Mobility could be improved carefully selecting a proper dielectric environment, which plays an important role in the current transport in thin semiconductors. However, the major limitation of 2D-based electronics is related to a poor metal-TMD interface, often characterized by high Schottky barriers and Fermi-level pinning. Taking as example modern semiconductor technologies, highly doped MoS2 devices are carefully studied. The contact resistance extracted is lower with respect of undoped or untreated samples, and close to the requirements imposed by the semiconductor roadmaps. Another solution might rely on the annealing of the metal-TMD interface in order to create a 3D-alloy, which might be optimal in terms of contact resistance. The final part is related to the development of a TCAD model for 2D-semiconductors. At first, the model parameters were carefully tuned against theoretical and experimental results. Then, a TCAD software was used for a deeper understanding of experimental devices, regarding the metal-TMD and oxide-TMD interface. Later, the same model was improved considering a layered-structure, taking into consideration the semiconductive layers as well as the Van-der-Waals gaps in between them. en
dc.format.mimetype application/pdf en
dc.language.iso en en
dc.publisher University College Cork en
dc.rights © 2020, Gioele Mirabelli. en
dc.rights.uri https://creativecommons.org/licenses/by-nc-nd/4.0/ en
dc.subject TCAD en
dc.subject Semiconductor en
dc.subject Field-effect-transistor en
dc.subject 2D-materials en
dc.title Two-dimensional semiconductors for future electronics en
dc.type Doctoral thesis en
dc.type.qualificationlevel Doctoral en
dc.type.qualificationname PhD - Doctor of Philosophy en
dc.internal.availability Full text available en
dc.description.version Accepted Version en
dc.contributor.funder Irish Research Council en
dc.description.status Not peer reviewed en
dc.internal.school Electrical and Electronic Engineering en
dc.internal.conferring Autumn 2020 en
dc.internal.ricu Tyndall National Institute en
dc.relation.project Irish Research Council (Postgraduate Scholarship EPSPG/2015/69) en
dc.availability.bitstream openaccess


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