GeSn semiconductor for micro-nanoelectronic applications

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dc.contributor.advisor Duffy, Ray en
dc.contributor.advisor Holmes, Justin en
dc.contributor.author Galluccio, Emmanuele
dc.date.accessioned 2020-09-18T09:53:58Z
dc.date.available 2020-09-18T09:53:58Z
dc.date.issued 2020-04
dc.date.submitted 2020-04
dc.identifier.citation Galluccio, E. 2020. GeSn semiconductor for micro-nanoelectronic applications. PhD Thesis, University College Cork. en
dc.identifier.endpage 164 en
dc.identifier.uri http://hdl.handle.net/10468/10549
dc.description.abstract Within the last few years the steady electronic evolution lead the semiconductor world to study innovative device architectures and new materials able to replace Si platforms. In this scenario Ge1-xSnx alloy attracts the interest of the scientific community due to its ability to tune the material bandgap as a function of Sn content and its extreme compatibility with Si processing. Although the enhanced optical properties of Ge1-xSnx are evident, the augmented electrical properties such as the higher electron and holes mobility are also beneficial for metal oxide semiconductor. Therefore the alloy is expected to be a potential solution to integrate both electrical and optical devices. On one hand, several theoretical and experimental works depict the Ge1-xSnx alloy as a novel and fascinating solution to replace Si; on the other hand the material novelty forces us to enhance the knowledge of its fundamental physical and chemical properties, re-adapting the processing steps necessary to develop electronic and optical devices. In this dissertation a comprehensive study on Ge1-xSnx has been undertaken and discussed analysing a wide range of topics. The first chapter provides a detailed theoretical study on the electronic properties of the GeSn performed using first principle methods; subsequently the data obtained have been inserted into a TCAD software in order to create and calibrate a library used to simulate electrical devices. It is important to note, that at the beginning of this PhD GeSn was not an available material in the Synopsys device software, and thus it had to be defined from scratch As a next point, since the ever decreasing device size push toward the definition of Ohmic contacts, different stanogermanide films have been thoroughly analysed using various metals (Ni, Pt and Ti) annealed with two distinct methodologies (Rapid Thermal Annealing and Laser Thermal Annealing). Subsequently, considering the material limitation such as the limited thermal budget and the Sn segregation, an exhaustive study on the material doping has been firstly discussed theoretically and after experimentally characterized using both classical ion implantation and layer deposition techniques. The different building blocks of Field Effect Transistors have been investigated and tuned individually with the aim to develop FET devices with bottom up approach. Then, Field Effect Transistor devices using GeSn NWs grown by a VLS methodology with Sn composition ranging from (0.03-0.09 at.%) have been developed and extensively characterized with the state of the art present in literature. Finally the analysis of highly selective etch recipes lead to the development of sub-nm device configuration such as Gate-All-Around (GAA) structure obtained using classical top down lithography approach. The innovative structure was electrically characterized highlighting the possibility to obtain decananometer device architecture with this innovative alloy. Lastly thesis summary and final outlooks were reported with the aim to outline the thesis contribution and the future material investigations. en
dc.format.mimetype application/pdf en
dc.language.iso en en
dc.publisher University College Cork en
dc.rights © 2020, Emmanuele Galluccio. en
dc.rights.uri https://creativecommons.org/licenses/by-nc-nd/4.0/ en
dc.subject GeSn semicoductor en
dc.subject GeSn processing en
dc.subject GeSn simulation en
dc.subject GeSn nanowire en
dc.title GeSn semiconductor for micro-nanoelectronic applications en
dc.type Doctoral thesis en
dc.type.qualificationlevel Doctoral en
dc.type.qualificationname PhD - Doctor of Philosophy en
dc.internal.availability Full text available en
dc.description.version Accepted Version en
dc.description.status Not peer reviewed en
dc.internal.school Electrical and Electronic Engineering en
dc.internal.conferring Autumn 2020 en
dc.internal.ricu Tyndall National Institute en
dc.availability.bitstream openaccess


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© 2020, Emmanuele Galluccio. Except where otherwise noted, this item's license is described as © 2020, Emmanuele Galluccio.
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