Architectures for maximum-sequence-length digital delta-sigma modulators
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Published Version
Date
2008-04
Authors
Hosseini, Kaveh
Kennedy, Michael Peter
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE
Published Version
Abstract
In this paper, we extend the idea developed in some of our earlier works of using output feedback to make the quantization step in a digital delta-sigma modulator (DDSM) appear prime. This maximizes the cycle lengths for constant inputs, spreading the quantization error over the maximum number of frequency terms, and consequently, minimizing the power per tone. We show how this concept can be applied to multibit higher order error-feedback modulators (EFMs). In addition, we show that the idea can be implemented in a class of single-quantizer DDSMs (SQ-DDSM) where STF (z) = z(-L) and NTF (z) = (1 - Z(-1))(L).
Description
Keywords
Digital delta-sigma modulators , Error-feedback modulator , Maximum sequence length , Multibit quantizer , Noise shaping , Quantization noise
Citation
Hosseini, K., Kennedy, M.P., 2008. Architectures For Maximum-Sequence-Length Digital Delta-Sigma Modulators. IEEE Transactions On Circuits and Systems II - Express Briefs, 55(11), pp.1104-1108.
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