Development of inversion-mode and junctionless Indium-Gallium-Arsenide MOSFETs

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dc.contributor.advisor Hurley, Paul K. en
dc.contributor.advisor Cherkaoui, Karim en
dc.contributor.author Djara, Vladimir
dc.date.accessioned 2014-11-12T17:02:46Z
dc.date.available 2015-11-13T05:00:05Z
dc.date.issued 2013
dc.date.submitted 2013
dc.identifier.citation Djara, V. 2013. Development of inversion-mode and junctionless Indium-Gallium-Arsenide MOSFETs. PhD Thesis, University College Cork. en
dc.identifier.endpage 163
dc.identifier.uri http://hdl.handle.net/10468/1706
dc.description.abstract This PhD covers the development of planar inversion-mode and junctionless Al2O3/In0.53Ga0.47As metal-oxidesemiconductor field-effect transistors (MOSFETs). An implant activation anneal was developed for the formation of the source and drain (S/D) of the inversionmode MOSFET. Fabricated inversion-mode devices were used as test vehicles to investigate the impact of forming gas annealing (FGA) on device performance. Following FGA, the devices exhibited a subthreshold swing (SS) of 150mV/dec., an ION/IOFF of 104 and the transconductance, drive current and peak effective mobility increased by 29%, 25% and 15%, respectively. An alternative technique, based on the fitting of the measured full-gate capacitance vs gate voltage using a selfconsistent Poisson-Schrödinger solver, was developed to extract the trap energy profile across the full In0.53Ga0.47As bandgap and beyond. A multi-frequency inversion-charge pumping approach was proposed to (1) study the traps located at energy levels aligned with the In0.53Ga0.47As conduction band and (2) separate the trapped charge and mobile charge contributions. The analysis revealed an effective mobility (μeff) peaking at ~2850cm2/V.s for an inversion-charge density (Ninv) = 7*1011cm2 and rapidly decreasing to ~600cm2/V.s for Ninv = 1*1013 cm2, consistent with a μeff limited by surface roughness scattering. Atomic force microscopy measurements confirmed a large surface roughness of 1.95±0.28nm on the In0.53Ga0.47As channel caused by the S/D activation anneal. In order to circumvent the issue relative to S/D formation, a junctionless In0.53Ga0.47As device was developed. A digital etch was used to thin the In0.53Ga0.47As channel and investigate the impact of channel thickness (tInGaAs) on device performance. Scaling of the SS with tInGaAs was observed for tInGaAs going from 24 to 16nm, yielding a SS of 115mV/dec. for tInGaAs = 16nm. Flat-band μeff values of 2130 and 1975cm2/V.s were extracted on devices with tInGaAs of 24 and 20nm, respectively en
dc.description.sponsorship Science Foundation Ireland (SFI Grant 07/SRC/I1172 FORME, SFI Grant 09/IN.1/I2633 INVENT) en
dc.format.mimetype application/pdf en
dc.language.iso en en
dc.publisher University College Cork en
dc.rights © 2013, Vladimir Djara en
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/3.0/ en
dc.subject InGaAs en
dc.subject MOSFET en
dc.subject High-k en
dc.subject Junctionless en
dc.subject Interface traps en
dc.subject Border traps en
dc.subject Fixed oxide charge en
dc.title Development of inversion-mode and junctionless Indium-Gallium-Arsenide MOSFETs en
dc.type Doctoral thesis en
dc.type.qualificationlevel Doctoral en
dc.type.qualificationname PhD (Science) en
dc.internal.availability Full text available en
dc.description.version Accepted Version
dc.contributor.funder Science Foundation Ireland en
dc.description.status Not peer reviewed en
dc.internal.school Physics en
dc.check.reason This thesis is due for publication or the author is actively seeking to publish this material en
dc.check.opt-out Not applicable en
dc.thesis.opt-out false
dc.check.chapterOfThesis 5,6
dc.check.embargoformat E-thesis on CORA only en
ucc.workflow.supervisor paul.hurley@tyndall.ie
dc.internal.conferring Summer Conferring 2014


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