Flip chip packaging of digital silicon photonics MEMS Switch for cloud computing and data centre

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Hwang, How Yuan
Lee, Jun Su
Seok, Tae Joon
Forencich, Alex
Grant, Hannah R.
Knutson, Dylan
Quack, Niels
Han, Sangyoon
Muller, Richard S.
Papen, George C.
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Institute of Electrical and Electronics Engineers (IEEE)
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We report on the flip chip packaging of Micro-Electro-Mechanical System (MEMS)-based digital silicon photonic switching device and the characterization results of 12 × 12 switching ports. The challenges in packaging N2 electrical and 2N optical interconnections are addressed with single-layer electrical redistribution lines of 25 µm line width and space on aluminum nitride interposer and 13° polished 64-channel lidless fiber array (FA) with a pitch of 127 µm. 50 µm diameter solder spheres are laser-jetted onto the electrical bond pads surrounded by suspended MEMS actuators on the device before fluxless flip-chip bonding. A lidless FA is finally coupled near-vertically onto the device gratings using a 6-degree-of-freedom (6-DOF) alignment system. Fiber-to-grating coupler loss of 4.25 dB/facet, 10–11 bit error rate (BER) through the longest optical path, and 0.4 µs switch reconfiguration time have been demonstrated using 10 Gb/s Ethernet data stream.
Micromechanical devices , Optical fibers , Optical switches , Switching circuits , Flip chip , Interposer , Micro-electro-mechanical system , MEMS , Packaging , Silicon photonics
Hwang, H. Y., Lee, J. S., Seok, T. J., Forencich, A., Grant, H. R., Knutson, D., Quack, N., Han, S., Muller, R. S., Papen, G. C., Wu, M. C., O'Brien, P. (2017) 'Flip chip packaging of digital silicon photonics MEMS Switch for cloud computing and data centre', IEEE Photonics Journal, 9(3), 2900210 (10pp). doi: 10.1109/JPHOT.2017.2704097