Low subthreshold slope in junctionless multigate transistors

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dc.contributor.author Lee, Chi-Woo
dc.contributor.author Nazarov, Alexei N.
dc.contributor.author Ferain, Isabelle
dc.contributor.author Akhavan, Nima Dehdashti
dc.contributor.author Yan, Ran
dc.contributor.author Razavi, Pedram
dc.contributor.author Yu, Ran
dc.contributor.author Doria, Rodrigo T.
dc.contributor.author Colinge, Jean-Pierre
dc.date.accessioned 2017-07-28T11:22:09Z
dc.date.available 2017-07-28T11:22:09Z
dc.date.issued 2010
dc.identifier.citation Lee, C.-W., Nazarov, A. N., Ferain, I., Akhavan, N. D., Yan, R., Razavi, P., Yu, R., Doria, R. T. and Colinge, J.-P. (2010) 'Low subthreshold slope in junctionless multigate transistors', Applied Physics Letters, 96(10), pp. 102106. doi: 10.1063/1.3358131 en
dc.identifier.volume 96
dc.identifier.issued 10
dc.identifier.startpage 1
dc.identifier.endpage 3
dc.identifier.issn 0003-6951
dc.identifier.issn 1077-3118
dc.identifier.uri http://hdl.handle.net/10468/4345
dc.identifier.doi 10.1063/1.3358131
dc.description.abstract The improvement of subthreshold slope due to impact ionization is compared between "standard" inversion-mode multigate silicon nanowire transistors and junctionless transistors. The length of the region over which impact ionization takes place, as well as the amplitude of the impact ionization rate are found to be larger in the junctionless devices, which reduces the drain voltage necessary to obtain a sharp subthreshold slope. (C) 2010 American Institute of Physics. (doi: 10.1063/1.3358131) en
dc.description.sponsorship Science Foundation Ireland (Grant No. 05/IN/I888) en
dc.format.mimetype application/pdf en
dc.language.iso en en
dc.publisher AIP Publishing en
dc.relation.uri http://aip.scitation.org/doi/abs/10.1063/1.3358131
dc.rights © 2010 American Institute of Physics.This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. The following article appeared in Lee, C.-W., Nazarov, A. N., Ferain, I., Akhavan, N. D., Yan, R., Razavi, P., Yu, R., Doria, R. T. and Colinge, J.-P. (2010) 'Low subthreshold slope in junctionless multigate transistors', Applied Physics Letters, 96(10), pp. 102106 and may be found at http://aip.scitation.org/doi/abs/10.1063/1.3358131 en
dc.subject Impact ionization en
dc.subject Silicon en
dc.subject Ionization en
dc.subject MOSFETs en
dc.subject Doping en
dc.subject Silicon en
dc.subject Band gap en
dc.title Low subthreshold slope in junctionless multigate transistors en
dc.type Article (peer-reviewed) en
dc.internal.authorcontactother Pedram Razavi, Tyndall National Institute, University College Cork, Cork, Ireland +353 (0)21 2346675, Email: pedram.razavi@tyndall.ie en
dc.internal.availability Full text available en
dc.description.version Published Version en
dc.internal.wokid WOS:000275588000038
dc.contributor.funder Science Foundation Ireland
dc.contributor.funder Seventh Framework Programme
dc.description.status Peer reviewed en
dc.identifier.journaltitle Applied Physics Letters en
dc.internal.IRISemailaddress pedram.razavi@tyndall.ie en
dc.identifier.articleid 102106
dc.relation.project info:eu-repo/grantAgreement/EC/FP7::SP1::ICT/216171/EU/Silicon-based nanostructures and nanodevices for long term nanoelectronics applications/NANOSIL
dc.relation.project info:eu-repo/grantAgreement/EC/FP7::SP1::ICT/216373/EU/European platform for low-power applications on Silicon-on-Insulator Technology/EUROSOI+


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