Semiconductor nanowire fabrication via bottom-up & top-down paradigms

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dc.contributor.advisor Holmes, Justin D.
dc.contributor.author Hobbs, Richard G.
dc.date.accessioned 2012-02-23T17:30:33Z
dc.date.available 2012-02-23T17:30:33Z
dc.date.issued 2011-10
dc.date.submitted 2012-02-22
dc.identifier.citation Hobbs, R.G., 2011. Semiconductor nanowire fabrication via bottom-up & top-down paradigms. PhD Thesis, University College Cork. en
dc.identifier.uri http://hdl.handle.net/10468/535
dc.description.abstract Semiconductor nanowires are pseudo 1-D structures where the magnitude of the semiconducting material is confined to a length of less than 100 nm in two dimensions. Semiconductor nanowires have a vast range of potential applications, including electronic (logic devices, diodes), photonic (laser, photodetector), biological (sensors, drug delivery), energy (batteries, solar cells, thermoelectric generators), and magnetic (spintronic, memory) devices. Semiconductor nanowires can be fabricated by a range of methods which can be categorised into one of two paradigms, bottom-up or top-down. Bottom-up processes can be defined as those where structures are assembled from their sub-components in an additive fashion. Top-down fabrication strategies use sculpting or etching to carve structures from a larger piece of material in a subtractive fashion. This seminar will detail a number of novel routes to fabricate semiconductor nanowires by both bottom-up and top-down paradigms. Firstly, a novel bottom-up route to fabricate Ge nanowires with controlled diameter distributions in the sub-20 nm regime will be described. This route details nanowire synthesis and diameter control in the absence of a foreign seed metal catalyst. Additionally a top-down route to nanowire array fabrication will be detailed outlining the importance of surface chemistry in high-resolution electron beam lithography (EBL) using hydrogen silsesquioxane (HSQ) on Ge and Bi2Se3 surfaces. Finally, a process will be described for the directed self-assembly of a diblock copolymer (PS-b-PDMS) using an EBL defined template. This section will also detail a route toward selective template sidewall wetting of either block in the PS-b-PDMS system, through tailored functionalisation of the template and substrate surfaces. en
dc.format.mimetype application/pdf en
dc.language.iso en en
dc.publisher University College Cork en
dc.rights © 2011, Richard G. Hobbs en
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/3.0/ en
dc.subject Semiconductor nanowires en
dc.subject Electron beam lithography en
dc.subject Nanofabrication en
dc.subject.lcsh Germanium en
dc.subject.lcsh Nanoelectronics en
dc.subject.lcsh Nanowires en
dc.title Semiconductor nanowire fabrication via bottom-up & top-down paradigms en
dc.type Doctoral thesis en
dc.type.qualificationlevel Doctoral en
dc.type.qualificationname PhD (Chemistry) en
dc.internal.availability Full text available en
dc.description.version Accepted Version en
dc.contributor.funder Irish Research Council for Science Engineering and Technology en
dc.description.status Not peer reviewed en


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