Frontiers of Cu electrodeposition and electroless plating for on-chip interconnects

Rohan, James F.; Thompson, Damien

Frontiers of Cu electrodeposition and electroless plating for on-chip interconnects

Files

9694.pdf(327.67 KB)

Accepted version

Date

2013-11-21

Authors

Rohan, James F.

Thompson, Damien

Publisher

Springer

Published Version

10.1007/978-1-4614-9176-7_5

Abstract

In the electronics industry, interconnect is defined as a conductive connection between two or more circuit elements. It interconnects elements (transistor, resistors, etc.) on an integrated circuit or components on a printed circuit board. The main function of the interconnect is to contact the junctions and gates between device cells and input/output (I/O) signal pads. These functions require specific material properties. For performance or speed, the metallization structure should have low resistance and capacitance. For reliability, it is important to have the capability of carrying high current density, stability against thermal annealing, resistance against corrosion and good mechanical properties.

Keywords

Barrier layer , Atomic layer deposition , Seed layer , Physical vapour deposition , Chemical mechanical polishing

Citation

Rohan, J. F. and Thompson, D. (2014) 'Frontiers of Cu Electrodeposition and Electroless Plating for On-chip Interconnects', in Kondo, K., Akolkar, R.N., Barkey, D.P. & Yokoi, M. (eds.) Copper Electrodeposition for Nanofabrication of Electronics Devices, New York, NY: Springer New York, pp. 99-113. doi: 10.1007/978-1-4614-9176-7_5