Hardware reduction in digital delta-sigma modulators via error masking - part II: SQ-DDSM

Simple item page
dc.contributor.authorYe, Zhipeng
dc.contributor.authorKennedy, Michael Peter
dc.contributor.funderScience Foundation Irelanden
dc.contributor.funderIrish Research Council for Science Engineering and Technology
dc.date.accessioned2010-03-26T17:23:56Z
dc.date.available2010-03-26T17:23:56Z
dc.date.issued2009-02
dc.date.updated2010-03-26T16:16:55Z
dc.description.abstractIn this two-part paper, a design methodology for reduced-complexity digital delta-sigma modulators (DDSMs) based on error masking is presented. Rules for selecting the wordlengths of the stages in multistage architectures are elaborated. We show that the hardware requirement can be reduced by up to 20% compared with a conventional design, without sacrificing performance. Simulation results confirm theoretical predictions. Part I addresses multistage noise-shaping DDSMs, whereas Part II focuses on single-quantizer DDSMs.en
dc.description.sponsorshipScience Foundation Ireland (Grant 02/IN.1/I45, Grant 08/IN.1/I1854); Irish Research Council for Science, Engineering and Technology (Grant SC/2002/409).en
dc.description.statusPeer revieweden
dc.description.versionPublished Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationYe, Z., Kennedy, M.P., 2009. Hardware reduction in digital delta-sigma modulators via error masking - part II: Sq-DDSM. IEEE Transactions On Circuits and Systems II - Express Briefs, 56 (2), pp.112-116.en
dc.identifier.doi10.1109/TCSII.2008.2010188
dc.identifier.endpage116en
dc.identifier.issn1549-7747
dc.identifier.issued2en
dc.identifier.journaltitleIEEE Transactions On Circuits and Systems II - Express Briefsen
dc.identifier.startpage112en
dc.identifier.urihttps://hdl.handle.net/10468/131
dc.identifier.volume56en
dc.language.isoenen
dc.publisherIEEEen
dc.rights©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en
dc.subjectDigital delta-sigma modulatorsen
dc.subjectError maskingen
dc.subjectReduced complexityen
dc.subject.lcshDigital modulationen
dc.titleHardware reduction in digital delta-sigma modulators via error masking - part II: SQ-DDSMen
dc.typeArticle (peer-reviewed)en
Files
Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
ZY_HardwareIIPV2009.pdf
Size:
590.87 KB
Format:
Adobe Portable Document Format
Description:
Published Version
Download
License bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
license.txt
Size:
4.04 KB
Format:
Item-specific license agreed upon to submission
Description:
Download
Collections
Electrical and Electronic Engineering - Journal Articles