An investigation of border traps and interface states in high-k/InGaAs metal-oxide-semiconductor systems
| dc.check.embargoformat | Not applicable | en |
| dc.check.info | No embargo required | en |
| dc.check.opt-out | Not applicable | en |
| dc.check.reason | No embargo required | en |
| dc.check.type | No Embargo Required | |
| dc.contributor.advisor | Hurley, Paul K. | en |
| dc.contributor.advisor | Monaghan, Scott | en |
| dc.contributor.author | Lin, Jun | |
| dc.contributor.funder | Science Foundation Ireland | en |
| dc.contributor.funder | Seventh Framework Programme | en |
| dc.date.accessioned | 2018-01-30T12:47:49Z | |
| dc.date.available | 2018-01-30T12:47:49Z | |
| dc.date.issued | 2017 | |
| dc.date.submitted | 2017 | |
| dc.description.abstract | One approach to saving energy in metal-oxide-semiconductor field effect transistors (MOSFETs) is to replace SiO2/Si structure with high dielectric constant (high-k) oxides on high mobility channel materials (e.g. InGaAs), which have the potential to achieve a comparable on current and operating frequency to silicon, but at a reduced supply voltage. In this thesis, investigation into border traps (or charge trapping) and interface states, both of which can induce device instability, in HfO2/InGaAs and Al2O3/InGaAs metal-oxidesemiconductor (MOS) structures was carried out with an emphasis on the characterization of border traps using capacitance-voltage (C-V) hysteresis measurement. The charge trapping is observed to be mainly a reversible process. The trapped charge is predominantly localized as a sheet charge near/at the high-k/InGaAs interfacial layer (~1nm), which can contain native oxides of InGaAs. The engineering of the high-k/InGaAs interface is therefore the key to reducing C-V hysteresis and improving device reliability. This work demonstrates the ability to reduce border trap density with forming gas annealing (5% H2 / 95% N2) in the range 3500C~4500C for Al2O3/InGaAs and HfO2/InGaAs MOS structures. Moreover, it is observed that C-V hysteresis increases with a power law dependence with the increasing stress time (in accumulation) at the initial stage of stressing and tends to reach a plateau at sufficiently long stress times due to the filling of almost all the pre-existing border traps. This therefore provides a method to estimate the total trap density under certain oxide field. Furthermore, a combined C-V and hard x-ray photoelectron spectroscopy (HAXPES) study was performed on Al2O3/InGaAs MOS structure, revealing a partially pinned Al2O3/InGaAs interface. The Fermi level position at zero gate bias was calculated using both techniques, and a reasonable agreement was achieved. This combined study thus provides more certainty on the interface state profile extractions. | en |
| dc.description.status | Not peer reviewed | en |
| dc.description.version | Accepted Version | |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Lin, J. 2017. An investigation of border traps and interface states in high-k/InGaAs metal-oxide-semiconductor systems. PhD Thesis, University College Cork. | en |
| dc.identifier.endpage | 164 | en |
| dc.identifier.uri | https://hdl.handle.net/10468/5349 | |
| dc.language.iso | en | en |
| dc.publisher | University College Cork | en |
| dc.relation.project | info:eu-repo/grantAgreement/EC/FP7::SP1::ICT/619325/EU/Compound Semiconductors for 3D integration/COMPOSE3 | en |
| dc.relation.project | info:eu-repo/grantAgreement/SFI/SFI Principal Investigator Programme (PI)/09/IN.1/I2633/IE/Investigating Emerging Non-Silicon Transistors (INVENT)/ | en |
| dc.rights | © 2017, Jun Lin. | en |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/ | en |
| dc.subject | InGaAs MOS | en |
| dc.subject | Border traps | en |
| dc.subject | Interface states | en |
| dc.thesis.opt-out | false | |
| dc.title | An investigation of border traps and interface states in high-k/InGaAs metal-oxide-semiconductor systems | en |
| dc.type | Doctoral thesis | en |
| dc.type.qualificationlevel | Doctoral | en |
| dc.type.qualificationname | PhD (Science) | en |
| ucc.workflow.supervisor | paul.hurley@tyndall.ie |
Files
Original bundle
1 - 2 of 2
Loading...
- Name:
- abstract_LinJ.pdf
- Size:
- 84.28 KB
- Format:
- Adobe Portable Document Format
- Description:
- Abstract
Loading...
- Name:
- LinJ_PhD2017.pdf
- Size:
- 7.26 MB
- Format:
- Adobe Portable Document Format
- Description:
- Full Text E-thesis
License bundle
1 - 1 of 1
Loading...
- Name:
- license.txt
- Size:
- 5.62 KB
- Format:
- Item-specific license agreed upon to submission
- Description: