On the robustness of R-2R ladder DACs
dc.contributor.author | Kennedy, Michael Peter | |
dc.date.accessioned | 2010-05-04T13:04:08Z | |
dc.date.available | 2010-05-04T13:04:08Z | |
dc.date.issued | 2000-02 | |
dc.date.updated | 2010-04-29T08:45:47Z | |
dc.description.abstract | A model of the linear R-2R ladder digital-to-analog converter (DAC) is developed in terms of the ratios of the effective resistances at the nodes of the ladder. This formulation demonstrates clearly why an infinite number of different sets of resistors can produce the same linearity error and shows how this error can be reduced by trimming. The relationship between the weights of the bits and the resistor ratios suggests appropriate trimming, design, and test strategies | en |
dc.description.status | Peer reviewed | en |
dc.description.version | Published Version | en |
dc.format.mimetype | application/pdf | en |
dc.identifier.citation | Kennedy, M.P. , 2000. On the robustness of R-2R ladder DACs. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 47(2), pp.109-116. doi: 10.1109/81.828565 | en |
dc.identifier.doi | 10.1109/81.828565 | |
dc.identifier.endpage | 116 | en |
dc.identifier.issn | 1057-7122 | |
dc.identifier.issued | 2 | en |
dc.identifier.journaltitle | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications | en |
dc.identifier.startpage | 109 | en |
dc.identifier.uri | https://hdl.handle.net/10468/170 | |
dc.identifier.volume | 47 | en |
dc.language.iso | en | en |
dc.publisher | IEEE | en |
dc.rights | ©2000 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | en |
dc.subject | Data converters | en |
dc.subject | Resistive ladders | en |
dc.subject | Mixed-signal circuits | en |
dc.subject.lcsh | Digital-to-analog converters | en |
dc.subject.lcsh | Integrated circuits -- Testing | en |
dc.subject.lcsh | Ladder networks | en |
dc.title | On the robustness of R-2R ladder DACs | en |
dc.type | Article (peer-reviewed) | en |