A 7-bit 7-GHz multiphase interpolator-based DPC for CDR applications

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Khanghah, Meysam M.
Sadeghipour, Khosrov D.
Kelly, Denis
Antony, Cleitus
Ossieur, Peter
Townsend, Paul D.
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Institute of Electrical and Electronics Engineers (IEEE)
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This paper presents a 7-bit digital to phase converter (DPC) for high speed clock and data recovery (CDR) applications which is capable of generating multi-phase clocks at 7-GHz frequency. Fabricated in a standard 65-nm CMOS technology, the design introduces a modified phase interpolator (PI) and a quadrature phase corrector (QPC) to reduce the effect of the circuit imperfections on the DPC's resolution and linearity. Employing a 14-GHz quadrature reference clock, the DPC achieves DNL/INL of 0.7/6 LSB respectively while consuming 40.5 mW power from 1.05 V supply.
Digital to phase converter (DPC) , Clock and data recovery (CDR) , Phase interpolator (PI) , Wireline and optical communication
Khanghah, M. M., Sadeghipour, K. D., Kelly, D., Antony, C., Ossieur, P. and Townsend, P. D. (2022) 'A 7-bit 7-GHz multiphase interpolator-based DPC for CDR applications', IEEE Transactions on Circuits and Systems I: Regular Papers. doi: 10.1109/TCSI.2022.3191229.
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