Electronic transport in metallic and semimetallic nanostructures
| dc.check.embargoformat | Not applicable | en |
| dc.check.info | No embargo required | en |
| dc.check.opt-out | Not applicable | en |
| dc.check.reason | No embargo required | en |
| dc.check.type | No Embargo Required | |
| dc.contributor.advisor | Greer, James C. | en |
| dc.contributor.author | Sanchez-Soares, Alfonso | |
| dc.contributor.funder | Irish Research Council | en |
| dc.contributor.funder | Intel Corporation | en |
| dc.contributor.funder | Science Foundation Ireland | en |
| dc.date.accessioned | 2017-05-02T11:14:48Z | |
| dc.date.available | 2017-05-02T11:14:48Z | |
| dc.date.issued | 2017 | |
| dc.date.submitted | 2017 | |
| dc.description.abstract | After 50 years of continued efforts in downscaling basic electronic components which comprise integrated circuits (ICs), research into new device designs is critical as fundamental physical limits are being reached preventing further miniaturisation of designs traditionally employed by the semiconductor industry. With feature sizes in commercial ICs approaching 10 nm, new components designs must take into account the atomistic nature of the materials and interfaces which constitute its lower level components. In this work we explore the electronic structure and electronic transport properties of nanostructures based on metals and semimetals for applications in next generation ICs. We study the non-linear resistivity increase observed in copper nanostructures associated with quantum-size and surface effects in order to assess their suitability for sub-10-nm interconnect networks; for applications in logic gates, we present an alternative design to planar CMOS technology based on exploitation of surface and size effects in semimetallic nanostructures. | en |
| dc.description.sponsorship | Irish Research Council (Postgraduate Scholarship); Science Foundation Ireland (Investigator Program, Grant No. 13/IA/1956) | en |
| dc.description.status | Not peer reviewed | en |
| dc.description.version | Accepted Version | |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Sanchez-Soares, A. 2017. Electronic transport in metallic and semimetallic nanostructures. PhD Thesis, University College Cork. | en |
| dc.identifier.endpage | 145 | en |
| dc.identifier.uri | https://hdl.handle.net/10468/3904 | |
| dc.language.iso | en | en |
| dc.publisher | University College Cork | en |
| dc.rights | © 2017, Alfonso Sanchez-Soares. | en |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/ | en |
| dc.subject | Nanoelectronics | en |
| dc.subject | Electronic transport | en |
| dc.subject | Quantum confinement | en |
| dc.thesis.opt-out | false | |
| dc.title | Electronic transport in metallic and semimetallic nanostructures | en |
| dc.type | Doctoral thesis | en |
| dc.type.qualificationlevel | Doctoral Degree (Structured) | en |
| dc.type.qualificationname | PhD (Science) | en |
| ucc.workflow.supervisor | jim.greer@tyndall.ie |
