Comprehensive design procedure for racetrack microinductors

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dc.contributor.authorLópez López, Jaime
dc.contributor.authorZumel, Pablo
dc.contributor.authorO'Driscoll, Séamus
dc.contributor.authorPavlovic, Zoran
dc.contributor.authorMurphy, Ruaidhrí
dc.contributor.authorO'Mathuna, Cian
dc.contributor.authorFernandez, Cristina
dc.contributor.funderMinisterio de Economía, Industria y Competitividad, Gobierno de Españaen
dc.contributor.funderEuropean Regional Development Funden
dc.contributor.funderSeventh Framework Programmeen
dc.contributor.funderComunidad de Madriden
dc.date.accessioned2021-07-13T07:47:15Z
dc.date.available2021-07-13T07:47:15Z
dc.date.issued2021-07-05
dc.date.updated2021-07-13T07:30:14Z
dc.description.abstractPresent needs in efficiency and integration are driving research towards the miniaturization of power converters. Among the latest components to achieve the desired degree of integration are cored micro-inductors and they are still one of the hardest devices to optimize, due to the high number of freedom degrees in their fabrication. In this paper, a comprehensive design procedure for these micro-inductors is presented. The proposed method makes it possible to design the optimal device in a single iteration. It also allows the designer to easily ascertain the limits of the inductor in terms of handled current and losses and provides valuable physical insight on the output of the process.en
dc.description.sponsorshipMinisterio de Economía, Industria y Competitividad, Gobierno de España and European Regional Development Fund (EPIIoTDPI2017-88062-R); Comunidad de Madrid (EPUC3M26)en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationLópez López, J., Zumel, P., O'Driscoll, S., Pavlovic, Z., Murphy, R., O'Mathuna, C. and Fernandez, C. (2021) 'Comprehensive design procedure for racetrack microinductors', IEEE Journal of Emerging and Selected Topics in Power Electronics. doi: 10.1109/JESTPE.2021.3094631en
dc.identifier.doi10.1109/JESTPE.2021.3094631en
dc.identifier.eissn2168-6785
dc.identifier.issn2168-6777
dc.identifier.journaltitleIEEE Journal of Emerging and Selected Topics in Power Electronicsen
dc.identifier.urihttps://hdl.handle.net/10468/11559
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.relation.projectinfo:eu-repo/grantAgreement/EC/FP7::SP1::ICT/619488/EU/Modular interposer architecture providing scalable heat removal, power delivery, and communication/CARRICOOLen
dc.rights© 2021, IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.subjectPwrSoCen
dc.subjectInductor-on-siliconen
dc.subjectMicroinductoren
dc.subjectIntegrated poweren
dc.subjectThin-filmen
dc.subjectRace-tracken
dc.subjectPlanar BEOLen
dc.subjectMagnetics-on-siliconen
dc.titleComprehensive design procedure for racetrack microinductorsen
dc.typeArticle (peer-reviewed)en
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