Restriction lift date: 2030-06-12
CMOS techniques for direct digitisation of current signals
| dc.check.date | 2030-06-12 | |
| dc.contributor.advisor | O'Hare, Daniel | |
| dc.contributor.advisor | Cantillon-Murphy, Padraig | |
| dc.contributor.author | Wall, Anthony | en |
| dc.contributor.funder | Infineon Technologies | |
| dc.date.accessioned | 2025-05-13T11:04:58Z | |
| dc.date.available | 2025-05-13T11:04:58Z | |
| dc.date.issued | 2024 | |
| dc.date.submitted | 2024 | |
| dc.description.abstract | This thesis presents a series of techniques and circuits to further the art of CMOS current-to-digital conversion using digitally-assisted techniques, particularly suited to highly-scaled technology nodes. A new model of the Current-Controlled Ring Oscillator (CCRO) is presented which describes its non-linearity with a single parameter, the Active-to-Dead Time Ratio (TADR). An improved squaring CCRO topology is presented, based on the TADR model which improves upon the linearity of inverter-based CCROs by 9.75 dB. The power-linearity trade-off is greatly improved by the introduction of the Ping-Pong CCO (PP-CCO), a new Current Controlled Oscillator (CCO) architecture. It demonstrates power consumption 19× lower than the improved squaring CCRO, and 2.75× lower than the state of the art. Based on the TADR model, a novel time-based, digitally-assisted linearity correction method is designed. This method uses a Time Quantiser (TQ) to quantise the period of the CCO, and its dead time is simply subtracted in the digital domain. The TQ is designed using a novel injection-locked Cyclic-Coupled Ring Oscillator (Cyc-CRO), which enables the oscillator’s use in TQs. Using the PP-CCO and the time-based linearity correction backend, the second harmonic, usually dominant in single-ended CCRO architectures, drops below the noise floor and >25 dB of correction is seen without the need for calibration or lookup tables. | en |
| dc.description.status | Not peer reviewed | en |
| dc.description.version | Accepted Version | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Wall, A. 2024. CMOS techniques for direct digitisation of current signals. PhD Thesis, University College Cork. | |
| dc.identifier.endpage | 382 | |
| dc.identifier.uri | https://hdl.handle.net/10468/17472 | |
| dc.language.iso | en | en |
| dc.publisher | University College Cork | en |
| dc.rights | © 2024, Anthony Wall. | |
| dc.rights.uri | https://creativecommons.org/licenses/by/4.0/ | |
| dc.subject | Analogue to digital converter | |
| dc.subject | ADC | |
| dc.subject | Current controlled ring oscillator | |
| dc.subject | CCRO | |
| dc.subject | Time domain ADC | |
| dc.subject | Current to digital converter | |
| dc.subject | CDC | |
| dc.subject | Time quantiser | |
| dc.subject | TQ | |
| dc.subject | Digitally assisted | |
| dc.subject | Linearity correction | |
| dc.title | CMOS techniques for direct digitisation of current signals | |
| dc.type | Doctoral thesis | en |
| dc.type.qualificationlevel | Doctoral | en |
| dc.type.qualificationname | PhD - Doctor of Philosophy | en |
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