Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance - voltage analysis
dc.check.date | 2019-03-21 | |
dc.check.info | Access to this article is restricted until 12 months after publication by request of the publisher. | en |
dc.contributor.author | Khosravi, Ava | |
dc.contributor.author | Azcatl, Angelica | |
dc.contributor.author | Bolshakov, Pavel | |
dc.contributor.author | Mirabelli, Gioele | |
dc.contributor.author | Zhao, Peng | |
dc.contributor.author | Caruso, Enrico | |
dc.contributor.author | Hinkle, Christopher L. | |
dc.contributor.author | Hurley, Paul K. | |
dc.contributor.author | Wallace, Robert M. | |
dc.contributor.author | Young, Chadwin D. | |
dc.contributor.funder | Science Foundation Ireland | en |
dc.contributor.funder | National Science Foundation | en |
dc.date.accessioned | 2018-03-26T11:19:20Z | |
dc.date.available | 2018-03-26T11:19:20Z | |
dc.date.issued | 2018 | |
dc.date.updated | 2018-03-21T11:22:35Z | |
dc.description.abstract | Abstract Border traps and interface traps in HfO2/few-layer MoS2 top-gate stacks are investigated by C-V characterization. Frequency dependent C-V data shows dispersion in both the depletion and accumulation regions for the MoS2 devices.The border trap density is extracted with a distributed model, and interface traps are analyzed using the high-low frequency and multi-frequency methods. The physical origins of interface traps appear to be caused by impurities/defects in the MoS2 layers, performing as band tail states, while the border traps are associated with the dielectric, likely a consequence of the low-temperature deposition. This work provides a method of using multiple C-V measurements and analysis techniques to analyze the behavior of high-k/TMD gate stacks and deconvolute border traps from interface traps. | en |
dc.description.sponsorship | National Science Foundation (NSF-ECCS–1407765) | en |
dc.description.status | Peer reviewed | en |
dc.description.version | Accepted Version | en |
dc.format.mimetype | application/pdf | en |
dc.identifier.articleid | 031002 | |
dc.identifier.citation | Zhao, P., Khosravi, A., Azcatl, A., Bolshakov, P., Mirabelli, G., Caruso, E., Hinkle, C. L., Hurley, P. K ., Wallace, R. M., Young, C. D. (2018) 'Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance - voltage analysis', 2D Materials, 5(3), 031002 (8pp). doi:10.1088/2053-1583/aab728 | en |
dc.identifier.doi | 10.1088/2053-1583/aab728 | |
dc.identifier.endpage | 8 | |
dc.identifier.issn | 2053-1583 | |
dc.identifier.issued | 3 | |
dc.identifier.journaltitle | 2D Materials | en |
dc.identifier.startpage | 1 | |
dc.identifier.uri | https://hdl.handle.net/10468/5692 | |
dc.identifier.volume | 5 | |
dc.language.iso | en | en |
dc.publisher | IOP Publishing Ltd. | en |
dc.relation.project | info:eu-repo/grantAgreement/SFI/SFI US Ireland R&D Partnership/13/US/I2862/IE/Understanding the Nature of Interfaces in Two Dimensional Electronic Devises (UNITE)/ | en |
dc.rights | © 2018, IOP Publishing Ltd. This Accepted Manuscript is available for reuse under a CC BY-NC-ND 3.0 licence. | en |
dc.rights.uri | https://creativecommons.org/licences/by-nc-nd/3.0 | en |
dc.subject | Transition metal dichalcogenides | en |
dc.subject | TMDs | en |
dc.subject | Border traps | en |
dc.subject | Interface traps | en |
dc.subject | HfO2 / MoS2 | en |
dc.subject | Capacitance - voltage | en |
dc.subject | C-V | en |
dc.title | Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance - voltage analysis | en |
dc.type | Article (peer-reviewed) | en |