Simplified decoding techniques for linear block codes

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dc.check.embargoformatBoth hard copy thesis and e-thesisen
dc.check.entireThesisEntire Thesis Restricted
dc.check.opt-outNot applicableen
dc.check.reasonThis thesis is due for publication or the author is actively seeking to publish this materialen
dc.contributor.advisorPopovici, Emanuel M.en
dc.contributor.authorSrivastava, Shraddha
dc.contributor.funderScience Foundation Irelanden
dc.contributor.funderCSI, Dublinen
dc.date.accessioned2014-03-10T11:51:14Z
dc.date.issued2013
dc.date.submitted2013
dc.description.abstractError correcting codes are combinatorial objects, designed to enable reliable transmission of digital data over noisy channels. They are ubiquitously used in communication, data storage etc. Error correction allows reconstruction of the original data from received word. The classical decoding algorithms are constrained to output just one codeword. However, in the late 50’s researchers proposed a relaxed error correction model for potentially large error rates known as list decoding. The research presented in this thesis focuses on reducing the computational effort and enhancing the efficiency of decoding algorithms for several codes from algorithmic as well as architectural standpoint. The codes in consideration are linear block codes closely related to Reed Solomon (RS) codes. A high speed low complexity algorithm and architecture are presented for encoding and decoding RS codes based on evaluation. The implementation results show that the hardware resources and the total execution time are significantly reduced as compared to the classical decoder. The evaluation based encoding and decoding schemes are modified and extended for shortened RS codes and software implementation shows substantial reduction in memory footprint at the expense of latency. Hermitian codes can be seen as concatenated RS codes and are much longer than RS codes over the same aphabet. A fast, novel and efficient VLSI architecture for Hermitian codes is proposed based on interpolation decoding. The proposed architecture is proven to have better than Kötter’s decoder for high rate codes. The thesis work also explores a method of constructing optimal codes by computing the subfield subcodes of Generalized Toric (GT) codes that is a natural extension of RS codes over several dimensions. The polynomial generators or evaluation polynomials for subfield-subcodes of GT codes are identified based on which dimension and bound for the minimum distance are computed. The algebraic structure for the polynomials evaluating to subfield is used to simplify the list decoding algorithm for BCH codes. Finally, an efficient and novel approach is proposed for exploiting powerful codes having complex decoding but simple encoding scheme (comparable to RS codes) for multihop wireless sensor network (WSN) applications.en
dc.description.sponsorshipScience Foundation Ireland (06/MI/006)en
dc.description.statusNot peer revieweden
dc.description.versionAccepted Version
dc.format.mimetypeapplication/pdfen
dc.identifier.citationSrivastava, S. 2013. Simplified decoding techniques for linear block codes. PhD Thesis, University College Cork.en
dc.identifier.endpage136
dc.identifier.urihttps://hdl.handle.net/10468/1436
dc.language.isoenen
dc.publisherUniversity College Corken
dc.rights© 2013, Shraddha Srivastava.en
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/en
dc.subjectError correction codesen
dc.subjectReed-Solomon codesen
dc.subjectHermitian codesen
dc.subjectBCH codesen
dc.subjectToric codesen
dc.subjectSubfield subcodesen
dc.subjectCoding theoryen
dc.subject.lcshWireless sensor networksen
dc.subject.lcshError-correcting codes (Information theory)en
dc.thesis.opt-outfalse
dc.titleSimplified decoding techniques for linear block codesen
dc.typeDoctoral thesisen
dc.type.qualificationlevelDoctoralen
dc.type.qualificationnamePHD (Engineering)en
ucc.workflow.supervisore.popovici@ucc.ie
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