Transport properties and electrical device characteristics with the TiMeS computational platform: Application in silicon nanowires

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dc.contributor.authorSharma, Dimpy
dc.contributor.authorAnsari, Lida
dc.contributor.authorFeldman, Baruch
dc.contributor.authorIakovidis, M.
dc.contributor.authorGreer, James C.
dc.contributor.authorFagas, GĂ­orgos
dc.contributor.funderHigher Education Authority
dc.contributor.funderSeventh Framework Programme
dc.contributor.funderScience Foundation Ireland
dc.date.accessioned2017-09-20T10:06:33Z
dc.date.available2017-09-20T10:06:33Z
dc.date.issued2013
dc.description.abstractNanoelectronics requires the development of a priori technology evaluation for materials and device design that takes into account quantum physical effects and the explicit chemical nature at the atomic scale. Here, we present a cross-platform quantum transport computation tool. Using first-principles electronic structure, it allows for flexible and efficient calculations of materials transport properties and realistic device simulations to extract current-voltage and transfer characteristics. We apply this computational method to the calculation of the mean free path in silicon nanowires with dopant and surface oxygen impurities. The dependence of transport on basis set is established, with the optimized double zeta polarized basis giving a reasonable compromise between converged results and efficiency. The current-voltage characteristics of ultrascaled (3 nm length) nanowire-based transistors with p-i-p and p-n-p doping profiles are also investigated. It is found that charge self-consistency affects the device characteristics more significantly than the choice of the basis set. These devices yield sourced-drain tunneling currents in the range of 0.5 nA (p-n-p junction) to 2 nA (p-i-p junction), implying that junctioned transistor designs at these length scales would likely fail to keep carriers out of the channel in the off-state. (C) 2013 AIP Publishing LLC.en
dc.description.statusPeer revieweden
dc.description.versionPublished Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.articleid203708
dc.identifier.citationSharma, D., Ansari, L., Feldman, B., Iakovidis, M., Greer, J. C. and Fagas, G. (2013) 'Transport properties and electrical device characteristics with the TiMeS computational platform: Application in silicon nanowires', Journal of Applied Physics, 113(20), 203708 (8pp). doi: 10.1063/1.4807578en
dc.identifier.doi10.1063/1.4807578
dc.identifier.endpage8
dc.identifier.issn0021-8979
dc.identifier.issn1089-7550
dc.identifier.issued20
dc.identifier.journaltitleJournal of Applied Physicsen
dc.identifier.startpage1
dc.identifier.urihttps://hdl.handle.net/10468/4725
dc.identifier.volume113
dc.language.isoenen
dc.publisherAIP Publishingen
dc.relation.projectinfo:eu-repo/grantAgreement/EC/FP7::SP1::ICT/257856/EU/Semiconducting Nanowire Platform for Autonomous Sensors/SINAPS
dc.relation.projectinfo:eu-repo/grantAgreement/SFI/SFI Principal Investigator Programme (PI)/06/IN.1/I857/IE/Semiconductor and Molecular Wire Simulation for Technology Design/
dc.relation.urihttp://aip.scitation.org/doi/10.1063/1.4807578
dc.rights© 2013, AIP Publishing LLC. This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. The following article appeared in Sharma, D., Ansari, L., Feldman, B., Iakovidis, M., Greer, J. C. and Fagas, G. (2013) 'Transport properties and electrical device characteristics with the TiMeS computational platform: Application in silicon nanowires', Journal of Applied Physics, 113(20), 203708 (8pp). doi: 10.1063/1.4807578 and may be found at http://aip.scitation.org/doi/10.1063/1.4807578en
dc.subjectTransport propertiesen
dc.subjectElectronic structureen
dc.subjectDopingen
dc.subjectBasis setsen
dc.subjectMaterials propertiesen
dc.titleTransport properties and electrical device characteristics with the TiMeS computational platform: Application in silicon nanowiresen
dc.typeArticle (peer-reviewed)en
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