Low subthreshold slope in junctionless multigate transistors
Lee, Chi-Woo; Nazarov, Alexei N.; Ferain, Isabelle; Akhavan, Nima Dehdashti; Yan, Ran; Razavi, Pedram; Yu, Ran; Doria, Rodrigo T.; Colinge, Jean-Pierre
Date:
2010
Copyright:
© 2010 American Institute of Physics.This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. The following article appeared in Lee, C.-W., Nazarov, A. N., Ferain, I., Akhavan, N. D., Yan, R., Razavi, P., Yu, R., Doria, R. T. and Colinge, J.-P. (2010) 'Low subthreshold slope in junctionless multigate transistors', Applied Physics Letters, 96(10), pp. 102106 and may be found at http://aip.scitation.org/doi/abs/10.1063/1.3358131
Citation:
Lee, C.-W., Nazarov, A. N., Ferain, I., Akhavan, N. D., Yan, R., Razavi, P., Yu, R., Doria, R. T. and Colinge, J.-P. (2010) 'Low subthreshold slope in junctionless multigate transistors', Applied Physics Letters, 96(10), pp. 102106. doi: 10.1063/1.3358131
Abstract:
The improvement of subthreshold slope due to impact ionization is compared between "standard" inversion-mode multigate silicon nanowire transistors and junctionless transistors. The length of the region over which impact ionization takes place, as well as the amplitude of the impact ionization rate are found to be larger in the junctionless devices, which reduces the drain voltage necessary to obtain a sharp subthreshold slope. (C) 2010 American Institute of Physics. (doi: 10.1063/1.3358131)
Show full item record
