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Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance - voltage analysis
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Accepted Version
Date
2018
Authors
Khosravi, Ava
Azcatl, Angelica
Bolshakov, Pavel
Mirabelli, Gioele
Zhao, Peng
Caruso, Enrico
Hinkle, Christopher L.
Hurley, Paul K.
Wallace, Robert M.
Young, Chadwin D.
Journal Title
Journal ISSN
Volume Title
Publisher
IOP Publishing Ltd.
Published Version
Abstract
Abstract Border traps and interface traps in HfO2/few-layer MoS2 top-gate stacks are investigated by C-V characterization. Frequency dependent C-V data shows dispersion in both the depletion and accumulation regions for the MoS2 devices.The border trap density is extracted with a distributed model, and interface traps are analyzed using the high-low frequency and multi-frequency methods. The physical origins of interface traps appear to be caused by impurities/defects in the MoS2 layers, performing as band tail states, while the border traps are associated with the dielectric, likely a consequence of the low-temperature deposition. This work provides a method of using multiple C-V measurements and analysis techniques to analyze the behavior of high-k/TMD gate stacks and deconvolute border traps from interface traps.
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Keywords
Transition metal dichalcogenides , TMDs , Border traps , Interface traps , HfO2 / MoS2 , Capacitance - voltage , C-V
Citation
Zhao, P., Khosravi, A., Azcatl, A., Bolshakov, P., Mirabelli, G., Caruso, E., Hinkle, C. L., Hurley, P. K ., Wallace, R. M., Young, C. D. (2018) 'Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance - voltage analysis', 2D Materials, 5(3), 031002 (8pp). doi:10.1088/2053-1583/aab728