Characterisation of the electroless nickel deposit as a barrier layer/under bump metallurgy on IC metallisation

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dc.contributor.author Rohan, James F.
dc.contributor.author O'Riordan, Gerard
dc.date.accessioned 2019-03-13T16:46:19Z
dc.date.available 2019-03-13T16:46:19Z
dc.date.issued 2002-11-07
dc.identifier.citation Rohan, J. F. and O’Riordan, G. (2003) 'Characterisation of the electroless nickel deposit as a barrier layer/under bump metallurgy on IC metallisation', Microelectronic Engineering, 65(1), pp. 77-85. doi: 10.1016/S0167-9317(02)00730-X en
dc.identifier.volume 65 en
dc.identifier.startpage 77 en
dc.identifier.endpage 85 en
dc.identifier.issn 0167-9317
dc.identifier.uri http://hdl.handle.net/10468/7622
dc.identifier.doi 10.1016/S0167-9317(02)00730-X
dc.description.abstract Selective electroless nickel–phosphorus deposits on integrated circuit (IC) metallisation such as copper and aluminium were characterised using differential scanning calorimetry (DSC), X-ray diffraction (XRD), scanning electron microscopy (SEM) and energy dispersive X-ray (EDX) for elemental analysis. Annealing the Ni–P deposits in nitrogen atmospheres at temperatures compatible with organic dielectrics for IC components, such as polyimide, was performed to characterise the deposits. The crystallisation behaviour of the electroless nickel deposits with different concentrations of co-deposited phosphorus was examined. en
dc.description.sponsorship Enterprise Ireland (grant number HE-1999-262 from the Enterprise Ireland Applied Research Grant Scheme) en
dc.format.mimetype application/pdf en
dc.language.iso en en
dc.publisher Elsevier en
dc.relation.uri http://www.sciencedirect.com/science/article/pii/S016793170200730X
dc.rights © 2003 Elsevier B.V. All rights reserved. This manuscript version is made available under the CC-BY-NC-ND 4.0 license en
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/4.0/ en
dc.subject Electroless en
dc.subject IC metallisation en
dc.subject Barrier en
dc.subject Crystallisation en
dc.subject Integrated circuits en
dc.subject Elemental analysis en
dc.subject Annealing en
dc.subject Crystallization en
dc.subject Dielectric materials en
dc.subject Differential scanning calorimetry en
dc.subject Electroless plating en
dc.subject Energy dispersive spectroscopy en
dc.subject Nickel deposits en
dc.subject Phosphate deposits en
dc.subject Polyimides en
dc.subject Scanning electron microscopy en
dc.subject X ray diffraction en
dc.title Characterisation of the electroless nickel deposit as a barrier layer/under bump metallurgy on IC metallisation en
dc.type Article (peer-reviewed) en
dc.internal.authorcontactother James Rohan, Tyndall Microsystems, University College Cork, Cork, Ireland. +353-21-490-3000 Email: james.rohan@tyndall.ie en
dc.internal.availability Full text available en
dc.date.updated 2019-03-13T16:43:08Z
dc.description.version Accepted Version en
dc.internal.rssid 243945325
dc.internal.wokid 000180598000006
dc.contributor.funder Enterprise Ireland en
dc.description.status Peer reviewed en
dc.identifier.journaltitle Microelectronic Engineering en
dc.internal.copyrightchecked No !!CORA!! en
dc.internal.licenseacceptance Yes en
dc.internal.IRISemailaddress james.rohan@tyndall.ie en


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© 2003 Elsevier B.V. All rights reserved. This manuscript version is made available under the CC-BY-NC-ND 4.0 license Except where otherwise noted, this item's license is described as © 2003 Elsevier B.V. All rights reserved. This manuscript version is made available under the CC-BY-NC-ND 4.0 license
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