Monolayer doping and other strategies in high surface-to-volume ratio silicon devices

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dc.contributor.authorDuffy, Ray
dc.contributor.authorKennedy, Noel
dc.contributor.authorMirabelli, Gioele
dc.contributor.authorGalluccio, Emmanuele
dc.contributor.authorHurley, Paul K.
dc.contributor.authorHolmes, Justin D.
dc.contributor.authorLong, Brenda
dc.contributor.funderEnterprise Irelanden
dc.contributor.funderEuropean Regional Development Funden
dc.date.accessioned2019-01-17T14:48:54Z
dc.date.available2019-01-17T14:48:54Z
dc.date.issued2018-03
dc.date.updated2019-01-10T12:27:21Z
dc.description.abstractTo maintain electron device scaling, in recent years the semiconductor industry has been forced to move from planar to non-planar thin-body electron device architectures. This alone has created the need to develop a radically new, non-destructive, conformal method for doping. Doping alters the electrical properties of a semiconductor, related to the access resistance. Monolayer doping (MLD) is a promising surface-based technique, whereby organic molecules are covalently bound to the semiconductor surface at relatively low processing temperatures (room temperature - 160 °C). A thermal treatment is then applied which both frees the dopant atoms from the organic molecules, and provides the energy for diffusion into the semiconductor substrate and subsequent activation. Very promising results have been achieved, but mostly on planar unpatterned substrates. There is now a need to assess the suitability of MLD for thin-body semiconductor features with high surface-to-volume ratios and densely packed structures. It is the aim of this review paper to consider MLD from this perspective.en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationDuffy, R., Kennedy, N., Mirabelli, G., Galluccio, E., Hurley, P. K., Holmes, J. D. and Long, B. (2018) 'Monolayer doping and other strategies in high surface-to-volume ratio silicon devices', 18th International Workshop on Junction Technology (IWJT), Shanghai, China. 8-9 March. doi: 10.1109/IWJT.2018.8330294en
dc.identifier.doi10.1109/IWJT.2018.8330294
dc.identifier.endpage6en
dc.identifier.isbn978-1-5386-4513-0
dc.identifier.isbn978-1-5386-4511-6
dc.identifier.journaltitle18th International Workshop on Junction Technology (IWJT)en
dc.identifier.startpage1en
dc.identifier.urihttps://hdl.handle.net/10468/7311
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.relation.ispartofIEEE 18th International Workshop on Junction Technology (IWJT)
dc.relation.urihttps://ieeexplore.ieee.org/document/8330294
dc.rights© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.subjectSemiconductoren
dc.subjectElectron device scalingen
dc.subjectMonolayer doping (MLD)en
dc.titleMonolayer doping and other strategies in high surface-to-volume ratio silicon devicesen
dc.typeConference itemen
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