Modeling 1/f and Lorenzian noise in III-V MOSFETs

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dc.contributor.authorCaruso, Enrico
dc.contributor.authorBettetti, F.
dc.contributor.authorDel Linz, L.
dc.contributor.authorPin, D.
dc.contributor.authorSegatto, M.
dc.contributor.authorPalestri, Pierpaolo
dc.date.accessioned2019-11-20T12:55:33Z
dc.date.available2019-11-20T12:55:33Z
dc.date.issued2019-09
dc.date.updated2019-11-20T12:52:35Z
dc.description.abstractWe present an approach to model 1/f and random telegraph noise in TCAD combining the models for non-local tunneling to traps and generation/recombination noise. The TCAD results are compared with simple numerical expression to understand the influence of the device and trap parameters on the noise spectrum. The simulation deck is then used to compute the low-frequency noise spectrum in III-V MOSFETs using traps distributions extracted from multi-frequency C-V measurements.en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationCaruso, E., Bettetti, F., Linz, L. D., Pin, D., Segatto, M. and Palestri, P. (2019) 'Modeling 1/f and Lorenzian noise in III-V MOSFETs', 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Udine, Italy, 4-6 Sept. doi: 10.1109/SISPAD.2019.8870548en
dc.identifier.doi10.1109/SISPAD.2019.8870548en
dc.identifier.endpage4en
dc.identifier.startpage1en
dc.identifier.urihttps://hdl.handle.net/10468/9167
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.relation.urihttps://ieeexplore.ieee.org/document/8870548
dc.rights© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.subject1/f noiseen
dc.subjectMOSFETen
dc.subjectSemiconductor device modelsen
dc.subjectSemiconductor device noiseen
dc.subjectTechnology CAD (electronics)en
dc.subjectIII-V MOSFETen
dc.subjectRandom telegraph noiseen
dc.subjectNonlocal tunnelingen
dc.subjectTCAD resultsen
dc.subjectTrap parametersen
dc.subjectLow-frequency noise spectrumen
dc.subjectTraps distributionsen
dc.subjectLorenzian noiseen
dc.subject1/f modelingen
dc.subjectGeneration-recombination noiseen
dc.subjectMultifrequency C-V measurementsen
dc.subjectTunnelingen
dc.subjectNumerical modelsen
dc.subjectCapacitance-voltage characteristicsen
dc.subjectFluctuationsen
dc.subjectSemiconductor device modelingen
dc.subjectLow-frequency noiseen
dc.subjectLorenzianen
dc.subject1/fen
dc.subjectBorder trapsen
dc.subjectModellingen
dc.subjectTCADen
dc.subjectNoiseen
dc.titleModeling 1/f and Lorenzian noise in III-V MOSFETsen
dc.typeConference itemen
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