Simulation of multigate SOI transistors with silicon, germanium and III-V channels

Razavi, Pedram

Simulation of multigate SOI transistors with silicon, germanium and III-V channels

dc.check.embargoformat	Not applicable	en
dc.check.info	No embargo required	en
dc.check.opt-out	Not applicable	en
dc.check.reason	No embargo required	en
dc.check.type	No Embargo Required
dc.contributor.advisor	Fagas, Gíorgos	en
dc.contributor.advisor	Colinge, Jean-Pierre	en
dc.contributor.author	Razavi, Pedram
dc.contributor.funder	Science Foundation Ireland	en
dc.date.accessioned	2013-12-18T17:35:56Z
dc.date.available	2013-12-18T17:35:56Z
dc.date.issued	2013
dc.date.submitted	2013
dc.description.abstract	In this work by employing numerical three-dimensional simulations we study the electrical performance and short channel behavior of several multi-gate transistors based on advanced SOI technology. These include FinFETs, triple-gate and gate-all-around nanowire FETs with different channel material, namely Si, Ge, and III-V compound semiconductors, all most promising candidates for future nanoscale CMOS technologies. Also, a new type of transistor called “junctionless nanowire transistor” is presented and extensive simulations are carried out to study its electrical characteristics and compare with the conventional inversion- and accumulation-mode transistors. We study the influence of device properties such as different channel material and orientation, dimensions, and doping concentration as well as quantum effects on the performance of multi-gate SOI transistors. For the modeled n-channel nanowire devices we found that at very small cross sections the nanowires with silicon channel are more immune to short channel effects. Interestingly, the mobility of the channel material is not as significant in determining the device performance in ultrashort channels as other material properties such as the dielectric constant and the effective mass. Better electrostatic control is achieved in materials with smaller dielectric constant and smaller source-to-drain tunneling currents are observed in channels with higher transport effective mass. This explains our results on Si-based devices. In addition to using the commercial TCAD software (Silvaco and Synopsys TCAD), we have developed a three-dimensional Schrödinger-Poisson solver based on the non-equilibrium Green’s functions formalism and in the framework of effective mass approximation. This allows studying the influence of quantum effects on electrical performance of ultra-scaled devices. We have implemented different mode-space methodologies in our 3D quantum-mechanical simulator and moreover introduced a new method to deal with discontinuities in the device structures which is much faster than the coupled-mode-space approach.	en
dc.description.status	Not peer reviewed	en
dc.description.version	Accepted Version
dc.format.mimetype	application/pdf	en
dc.identifier.citation	Razavi, P. 2013. Simulation of multigate SOI transistors with silicon, germanium and III-V channels. PhD Thesis, University College Cork.	en
dc.identifier.endpage	131
dc.identifier.uri	https://hdl.handle.net/10468/1287
dc.language.iso	en	en
dc.publisher	University College Cork	en
dc.rights	© 2013, Pedram Razavi.	en
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/3.0/	en
dc.subject	SOI	en
dc.subject	Nanowire transistors	en
dc.subject	Simulation	en
dc.subject	Multigate transistors	en
dc.subject	Silicon on insulator	en
dc.subject.lcsh	Semiconductors	en
dc.subject.lcsh	Transistors	en
dc.subject.lcsh	Silicon	en
dc.thesis.opt-out	false
dc.title	Simulation of multigate SOI transistors with silicon, germanium and III-V channels	en
dc.type	Doctoral thesis	en
dc.type.qualificationlevel	Doctoral	en
dc.type.qualificationname	PHD (Engineering)	en
ucc.workflow.supervisor	georgios.fagas@tyndall.ie