High frequency point-of-load (POL) DC-DC converters employing CMOS or GaN HEMT switches

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dc.availability.bitstreamopenaccess
dc.contributor.advisorO'Driscoll, Seamusen
dc.contributor.advisorexternalO’Donnell, Terenceen
dc.contributor.authorWalsh, Eoin
dc.contributor.funderScience Foundation Irelanden
dc.date.accessioned2021-01-08T12:21:50Z
dc.date.available2021-01-08T12:21:50Z
dc.date.issued2019-11-23
dc.date.submitted2019-11-23
dc.description.abstractThis thesis compares 2-level and 3-level buck converters, for use in very high frequency Point-of-Load (POL) DC-DC conversion. The nominal conversion is from 5 V to 1.8 V, at a 1 A output current, as is appropriate for use in a battery powered device. Today’s typical commercial POL solution for this challenge employs a monolithic CMOS power switcher operating at 2-3 MHz and uses a discrete surface mountable (SMT) ferrite chip inductor. This work investigates the performance achievable over the 20-40 MHz range with the use of a new specially designed and fabricated Tyndall thin-film magnetics-on-silicon (tf-MoS) inductor component. Two different power switching bridge types, CMOS and GaN, are investigated by both analytic loss modelling and by SPICE simulation. The CMOS bridge assumes a PMOS and NMOS combination using device models from a 180 nm CMOS process and the GaN bridge is based on commercially available discrete enhancement mode GaN HEMT switches. A behavioural model for a state-of-the-art commercial driver is developed. Measurements are initially made on a prototype 2-level GaN bridge circuit with opencircuit switch-node to allow for determination of load independent silicon losses. These measurements are used to validate both the switch with driver models and the circuit loss analyses. Inductor loss is one of the key practical limitations towards achieving very high frequency switching. Both modelling and measurement techniques are used to investigate the performance of the custom thin-film inductor. An ultimate reference case, low-loss air-core inductor was wound and used to measure the lowest achievable complete converter loss over the 20-40 MHz range. Two SMT ferrite chip inductor options were selected based on datasheets review and fitted in the prototype to achieve the best performance with currently available commercial components. These three inductors and a new custom Tyndall thin film inductor are all simulated and tested in combination with the 2-level GaN switching bridge. The measured overall efficiencies with loss breakdowns are presented for the various combinations of switch components and inductor technologies in 2-level converter. These measurements validate the models and simulations so that simulations for an extension to the 3-level converter and its performance comparison versus the 2-level converter may be made.en
dc.description.statusNot peer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationWalsh, E. 2019. High frequency point-of-load (POL) DC-DC converters employing CMOS or GaN HEMT switches. MRes Thesis, University College Cork.en
dc.identifier.endpage124en
dc.identifier.urihttps://hdl.handle.net/10468/10881
dc.language.isoenen
dc.publisherUniversity College Corken
dc.relation.projectScience Foundation Ireland (Adept Project)en
dc.rights© 2019, Eoin Walsh.en
dc.rights.urihttps://creativecommons.org/licenses/by-nc-nd/4.0/en
dc.subjectCMOS switchesen
dc.subjectMulti-level convertersen
dc.subjectBuck convertersen
dc.subjectGaN switchesen
dc.subjectPoint of loaden
dc.subjectHigh frequencyen
dc.titleHigh frequency point-of-load (POL) DC-DC converters employing CMOS or GaN HEMT switchesen
dc.typeMasters thesis (Research)en
dc.type.qualificationlevelMastersen
dc.type.qualificationnameMRes - Master of Researchen
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