Restriction lift date: 2025-12-31
Analog mixed signal IC design for magnetic tracking in surgery: low area clocking for CT∆ΣM ADCs for in-vivo sensing
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Date
2024
Authors
Ferro, Alessandro
Journal Title
Journal ISSN
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Publisher
University College Cork
Published Version
Abstract
The application for this work is an in-vivo sensor system for capturing magnetic signals used for tracking surgical instruments such as catheters in the body during minimally invasive surgical procedures. With the ascent of image-guided interventions, the precision in determining instrument pose has become paramount. The proposed system leverages low-frequency electromagnetic fields for magnetic tracking, ensuring non-ionising, line-of-sight-free measurements with millimetre-scale accuracy.
The miniaturisation demands of electromagnetic sensors, crucial to this endeavour, necessitate dimensions less than 0.5 mm in diameter, with the entire system fitting within an area of 1 mm x 0.5 mm. Continuous Time Delta Sigma (CT∆ΣM) ADCs emerge as a promising solution given their power efficiency and reduced requirements on peripheral circuits. These ADCs boast advantages like built-in anti-alias filtering and simplified input buffer requirements. However, their susceptibility to clock jitter, especially in single-bit versions, presents challenges.
This research introduces an original MATLAB and Simulink model for the CT∆ΣM. The model initially accounted for clock jitter employing a white noise spectrum. However, subsequent analysis unearthed a profound limitation: while FIR filters within the CT∆ΣM reduced periodic jitter’s impact, they were vulnerable to non-white noise spectrums. Although present in CT∆ΣM literature, this significant observation was previously uncharted for the signal bandwidth applications akin to this work.
To address this, the research delves into creating a comprehensive Phase noise spectrum model using MATLAB. This model elucidates the profound limitations imposed on the ADC’s in-band noise by the clock source’s phase noise spectrum, a revelation that reshaped our understanding of the CT∆ΣM’s constraints. Originally, a detailed schematic design for the clock source was undertaken with the primary objective of optimising area and power consumption, relying on a Resistor Capacitor based clock source for the Frequency-Locked Loop (FLL). The prevalent belief was that the typical phase noise spectrum of clock sources would have a negligible influence on the CT∆ΣM ADC. However, post-chip measurement analysis dispelled this notion. This research discovered that the clock source’s phase noise spectrum profoundly affected the CT∆ΣM ADC’s performance, highlighting an overlooked yet critical interplay.
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Keywords
CTDSM , ADC , FLL , Phase noise , CTDSM 2nd order model , Noise transfer function , VCO , Cadence Virtuoso , Phase noise model , Phase noise in CTDSM , Internal clock , FIR DACs , Periodic jitter , Absolute jitter , Jitter model , CTDSM with CIFF structure , SNR
Citation
Ferro, A. 2024. Analog mixed signal IC design for magnetic tracking in surgery: low area clocking for CT∆ΣM ADCs for in-vivo sensing. MSc Thesis, University College Cork.