Examining the relationship between capacitance-voltage hysteresis and accumulation frequency dispersion in InGaAs metal-oxide-semiconductor structures based on the response to post-metal annealing

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dc.check.date2019-05-13
dc.check.infoAccess to this article is restricted until 24 months after publication by request of the publisher.en
dc.contributor.authorLin, Jun
dc.contributor.authorMonaghan, Scott
dc.contributor.authorCherkaoui, Karim
dc.contributor.authorPovey, Ian M.
dc.contributor.authorSheehan, Brendan
dc.contributor.authorHurley, Paul K.
dc.contributor.funderScience Foundation Irelanden
dc.contributor.funderSeventh Framework Programmeen
dc.date.accessioned2017-09-01T09:06:47Z
dc.date.available2017-09-01T09:06:47Z
dc.date.issued2017-05-13
dc.date.updated2017-09-01T08:56:43Z
dc.description.abstractIn this work, we investigated the effect of forming gas annealing (FGA, 5% H2/95% N2, 250 °C to 450 °C) on border trap density in high-k/InGaAs metal-oxide-semiconductor (MOS) systems using accumulation frequency dispersion and capacitance-voltage (CV) hysteresis analysis. It is demonstrated that the optimum FGA temperature that reduces the accumulation frequency dispersion is 350 °C for HfO2/n-InGaAs and 450 °C for Al2O3/n-InGaAs MOS system. Volume density of border traps (Nbt) is estimated using the accumulation frequency dispersion based on a distributed model for border traps. It is shown that for HfO2/n-InGaAs MOS system, Nbt is reduced from 9.4 × 1019 cm− 3 eV− 1 before FGA to 6.3 × 1019 cm− 3 eV− 1 following FGA at 350 °C. For the case of Al2O3/n-InGaAs MOS system, Nbt is reduced from 5.7 × 1019 cm− 3 eV− 1 for no FGA to 3.4 × 1019 cm− 3 eV− 1 for FGA at 450 °C. Furthermore, it is shown that the most pronounced reduction in border trap density estimated from CV hysteresis analysis is observed at the same optimum FGA temperature that reduces the accumulation frequency dispersion, indicating that these two techniques for border trap analysis are correlated.en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationLin, J., Monaghan, S., Cherkaoui, K., Povey, I. M., Sheehan, B. and Hurley, P. K. (2017) 'Examining the relationship between capacitance-voltage hysteresis and accumulation frequency dispersion in InGaAs metal-oxide-semiconductor structures based on the response to post-metal annealing', Microelectronic Engineering, 178, pp. 204-208. doi:10.1016/j.mee.2017.05.020en
dc.identifier.doi10.1016/j.mee.2017.05.020
dc.identifier.endpage208en
dc.identifier.issn0167-9317
dc.identifier.journaltitleMicroelectronic Engineeringen
dc.identifier.startpage204en
dc.identifier.urihttps://hdl.handle.net/10468/4601
dc.identifier.volume178en
dc.language.isoenen
dc.publisherElsevier Ltden
dc.relation.projectinfo:eu-repo/grantAgreement/EC/FP7::SP1::ICT/619325/EU/Compound Semiconductors for 3D integration/COMPOSE3en
dc.relation.projectinfo:eu-repo/grantAgreement/EC/H2020::RIA/688784/EU/Integration of III-V Nanowire Semiconductors for next Generation High Performance CMOS SOC Technologies/INSIGHTen
dc.rights© 2017, Elsevier Ltd. All rights reserved. This manuscript version is made available under the CC-BY-NC-ND 4.0 license.en
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/en
dc.subjectBorder trapsen
dc.subjectHigh-ken
dc.subjectInGaAsen
dc.subjectCV hysteresisen
dc.subjectAccumulation frequency dispersionen
dc.subjectForming gas annealingen
dc.titleExamining the relationship between capacitance-voltage hysteresis and accumulation frequency dispersion in InGaAs metal-oxide-semiconductor structures based on the response to post-metal annealingen
dc.typeArticle (peer-reviewed)en
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