Understanding the impact of annealing on interface and border traps in the Cr/HfO2/Al2O3/MoS2 system

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dc.contributor.authorZhao, Peng
dc.contributor.authorPadovani, Andrea
dc.contributor.authorBolshakov, Pavel
dc.contributor.authorKhosravi, Ava
dc.contributor.authorLarcher, Luca
dc.contributor.authorHurley, Paul K.
dc.contributor.authorHinkle, Christopher L.
dc.contributor.authorWallace, Robert M.
dc.contributor.authorYoung, Chadwin D.
dc.contributor.funderScience Foundation Irelanden
dc.date.accessioned2021-11-05T14:53:07Z
dc.date.available2021-11-05T14:53:07Z
dc.date.issued2019-06-24
dc.description.abstractTop-gated, few-layer MoS2 transistors with HfO2 (6 nm)/Al2O3 (3 nm) gate dielectric stacks are fabricated and electrically characterized by capacitance–voltage (C–V) measurements to study electrically active traps (Dit) in the vicinity of the Al2O3/MoS2 interface. Devices with low Dit and high Dit are both observed in C–V characterization, and the impact of H2/N2 forming gas annealing at 300 and 400 °C on the Dit density and distribution is studied. A 300 °C anneal is able to reduce the Dit significantly, while the 400 °C anneal increases defects in the gate stack. Simulation with modeled defects suggests a sizable decrease in Dit, half the amount of positive fixed charge in the dielectric, and slightly increased unintentional doping in MoS2 after a 300 °C anneal. In the as-fabricated devices displaying high Dit levels, the energy distribution of the Dit located at the Al2O3/MoS2 interface is continuous from the conduction band edge of MoS2 down to 0.13–0.35 eV below the conduction band edge. A plausible Dit origin in our experiments could come from the unexpected oxygen atoms that fill the sulfur vacancies during the UV–O3 functionalization treatment. The border trap concentration in Al2O3 is the same, both before and after the anneal, suggesting a different origin of the border traps, possibly due to the low-temperature atomic-layer-deposited process.en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationZhao, P., Padovani, A., Bolshakov, P., Khosravi, A., Larcher, L., Hurley, P. K., Hinkle, C. L., Wallace R. M. and Young, C. D. (2019) 'Understanding the impact of annealing on interface and border traps in the Cr/HfO2/Al2O3/MoS2 system', ACS Applied Electronic Materials, 1 (8), pp.1372-1377. doi: 10.1021/acsaelm.8b00103en
dc.identifier.doi10.1021/acsaelm.8b00103en
dc.identifier.eissn2637-6113
dc.identifier.endpage1377en
dc.identifier.issued8en
dc.identifier.journaltitleACS Applied Electronic Materialsen
dc.identifier.startpage1372en
dc.identifier.urihttps://hdl.handle.net/10468/12149
dc.identifier.volume1en
dc.language.isoenen
dc.publisherAmerican Chemical Society (ACS)en
dc.relation.projectinfo:eu-repo/grantAgreement/SFI/SFI US Ireland R&D Partnership/13/US/I2862/IE/Understanding the Nature of Interfaces in Two Dimensional Electronic Devises (UNITE)/en
dc.rights© 2019, American Chemical Society. This document is the Accepted Manuscript version of a Published Work that appeared in final form in ACS Applied Electronic Materials, copyright © American Chemical Society after peer review and technical editing by the publisher. To access the final edited and published work see https://pubs.acs.org/doi/10.1021/acsaelm.8b00103en
dc.subjectMolybdenum disulfide (MoS2)en
dc.subjectHigh-k dielectricsen
dc.subjectAl2O3en
dc.subjectInterface trapsen
dc.subjectBorder trapsen
dc.subjectCapacitance-voltage (C-V)en
dc.titleUnderstanding the impact of annealing on interface and border traps in the Cr/HfO2/Al2O3/MoS2 systemen
dc.typeArticle (peer-reviewed)en
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