Design and fabrication of silicon-on-silicon-carbide substrates and power devices for space applications
Gammon, P. M.; Chan, C. W.; Gity, Farzan; Trajkovic, T.; Kilchytska, V.; Fan, L.; Pathirana, V.; Camuso, G.; Ben Ali, K.; Flandre, Denis; Mawby, P. A.
Date:
2017-05-23
Copyright:
© The Authors, published by EDP Sciences, 2017. This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Citation:
Gammon, P. M., Chan, C. W., Gity, F., Trajkovic, T., Kilchytska, V., Fan, L., Pathirana, V., Camuso, G., Ben Ali, K., Flandre, D., Mawby, P. A. and Gardner, J. W. (2017) 'Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications', ES3 Web of Conferences., 16, pp. 12003. doi: 10.1051/e3sconf/20171612003
Abstract:
A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si) wafer bonded to silicon carbide (SiC). This novel silicon-on-silicon-carbide (Si/SiC) substrate solution promises to combine the benefits of silicon-on-insulator (SOI) technology (i.e device confinement, radiation tolerance, high and low temperature performance) with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance). Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.
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