Properties of latent interface-trap buildup in irradiated metal-oxide-semiconductor transistors determined by switched bias isothermal annealing experiments

Abstract

Isothermal annealing experiments with switched gate bias have been performed to determine the properties of the latent interface-trap buildup during postirradiation annealing of metal-oxide-semiconductor transistors. It has been found that a bias-independent process occurs until the start of the latent interface-trap buildup. During the buildup itself, oxide-trap charge is not permanently neutralized, but is temporarily compensated. (C) 2000 American Institute of Physics. (DOI: 10.1063/1.1336159)