A systematic review of blockchain hardware acceleration architectures

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Date
2019-06
Authors
O'Mahony, Aidan T.
Popovici, Emanuel M.
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Institute of Electrical and Electronics Engineers (IEEE)
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Abstract
The aim of this paper is to provide a systematic literature review of blockchain hardware acceleration. Blockchain technology has achieved significant attention in recent years particularly in the area of cryptocurrency however it is gaining popularity in other applications such as supply chain management and e-government. Based on a structured, systematic review of the relevant literature, we present a classification of the primary areas in blockchain technology that make use of heterogeneous hardware for accelerating certain blockchain functions. Based on these findings, we identify various research gaps and future exploratory directions that are anticipated to be of significant value both for academics and industry practitioners.
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Keywords
Blockchain , Distributed ledger technology , Hardware architecture , Systematic literature review , Consensus algorithms , Heterogeneous hardware , FPGA , GPU , ASIC , CPU
Citation
O'Mahony, A. and Popovici, E. (2019) 'A Systematic Review of Blockchain Hardware Acceleration Architectures', 30th Irish Signals and Systems Conference (ISSC 2019) Maynooth, Ireland, 17-18 June. doi: 10.1109/ISSC.2019.8904936
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© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.