A simulation-based design method to transfer surface mount RF system to flip-chip die implementation
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Accepted Version
Date
2010-09-16
Authors
Zheng, Liqiang
Rodgers, Kenneth
Mathewson, Alan
O'Flynn, Brendan
Hayes, Michael
Ó Mathúna, S. Cian
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE
Published Version
Abstract
The flip-chip technology is a high chip density solution to meet the demand for very large scale integration design. For wireless sensor node or some similar RF applications, due to the growing requirements for the wearable and implantable implementations, flip-chip appears to be a leading technology to realize the integration and miniaturization. In this paper, flip-chip is considered as part of the whole system to affect the RF performance. A simulation based design is presented to transfer the surface mount PCB board to the flip-chip die package for the RF applications. Models are built by Q3D Extractor to extract the equivalent circuit based on the parasitic parameters of the interconnections, for both bare die and wire-bonding technologies. All the parameters and the PCB layout and stack-up are then modeled in the essential parts' design of the flip-chip RF circuit. By implementing simulation and optimization, a flip-chip package is re-designed by the parameters given by simulation sweep. Experimental results fit the simulation well for the comparison between pre-optimization and post-optimization of the bare die package's return loss performance. This design method could generally be used to transfer any surface mount PCB to flip-chip package for the RF systems or to predict the RF specifications of a RF system using the flip-chip technology.
Description
Keywords
Flip-chip design systems , PCB balun circuits , RF applications
Citation
Zheng, Liqiang; Rodgers, Kenneth; Mathewson, Alan; O'Flynn, Brendan; Hayes, Michael; Ó Mathúna, S. Cian, 2010. A simulation-based design method to transfer surface mount RF system to flip-chip die implementation. 3rd Electronic System-Integration Technology Conference (ESTC). Berlin, Germany 13-16 Sep. IEEE:
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