Power analysis of sorting algorithms on FPGA using OpenCL

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dc.contributor.authorO'Mahony, Aidan T.
dc.contributor.authorPopovici, Emanuel M.
dc.contributor.funderIntel Corporationen
dc.contributor.funderScience Foundation Irelanden
dc.date.accessioned2018-10-25T14:42:45Z
dc.date.available2018-10-25T14:42:45Z
dc.date.issued2018-06-21
dc.description.abstractWith the advent of big data and cloud computing, there is tremendous interest in optimised algorithms and architectures for sorting either using software or hardware. Field Programmable Gate Arrays (FPGAs) are being increasingly used in high end data servers providing a bridge between the flexibility of software and performance benefits of hardware. In this paper we look at implementations of some of the most popular sorting algorithms using OpenCL which take advantage of FPGA architecture. We evaluate these implementations in terms of power consumption which is measured using dedicated server power loggers and execution on Intel Arria 10 hardware. Our experiments show that taking advantage of software FIFOs have a significant impact on power consumption as well as requiring less hardware and memory resources.en
dc.description.sponsorshipIntel Corporation (Intel Programmable Solutions Group, Racktivity); Science Foundation Ireland (SFI INSIGHT Centre for Data Analytics)en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationO'Mahony, A. and Popovici, E. (2018) 'Power analysis of sorting algorithms on FPGA using OpenCL', 29th Irish Signals and Systems Conference (ISSC 2018), 21-22 June, Belfast. doi: 10.1109/ISSC.2018.8585361en
dc.identifier.doi10.1109/ISSC.2018.8585361
dc.identifier.endpage6en
dc.identifier.isbn978-1-5386-6046-1
dc.identifier.startpage1en
dc.identifier.urihttps://hdl.handle.net/10468/7054
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.relation.projectinfo:eu-repo/grantAgreement/SFI/SFI Research Centres/12/RC/2289/IE/INSIGHT - Irelands Big Data and Analytics Research Centre/
dc.relation.urihttps://ieeexplore.ieee.org/abstract/document/8585361en
dc.rights© 2018 European Union; © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.subjectVLSIen
dc.subjectASICen
dc.subjectFPGAs for signal processingen
dc.subjectEnergy efficiencyen
dc.subjectField Programmable Gate Arrays (FPGAs)en
dc.subjectBig dataen
dc.subjectCloud computingen
dc.subjectAccelerationen
dc.subjectSortingen
dc.subjectPower consumptionen
dc.subjectRadix sorten
dc.subjectBitonic sorten
dc.subjectOdd/even sorten
dc.subjectInsertion sorten
dc.titlePower analysis of sorting algorithms on FPGA using OpenCLen
dc.typeConference itemen
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