Packaging design challenges of high-density high-speed silicon photonic receiver
| dc.contributor.author | Hwang, How Yuan | en |
| dc.contributor.author | Morrisey, Padraic | en |
| dc.contributor.author | Gazman, Alexander | en |
| dc.contributor.author | London, Yanir | en |
| dc.contributor.author | Bergman, Keren | en |
| dc.contributor.author | O’Brien, Peter | en |
| dc.contributor.funder | Science Foundation Ireland | en |
| dc.date.accessioned | 2024-11-04T14:26:29Z | |
| dc.date.available | 2024-11-04T14:26:29Z | |
| dc.date.issued | 2019 | en |
| dc.description.abstract | We report on the first optically and electrically packaged prototype of the 48-channels silicon photonic single mode receiver device. The receiver device, measuring 11.8 mm x 32 mm, has 48 monolithically integrated Ge p-i-n photodetectors, 144 Al bond pads along three edges and 50 input grating couplers (including alignment shunts) located in the middle. The first receiver package prototype utilised short-length Au wire bonding from device bond pad to high speed board with edge SMP terminations. A 64-channel angle-polished fibre array was coupled permanently, with fibre-to-fibre transmission loss of 8.15 dB recorded through the alignment shunt. The current prototype package was able to conservatively support an aggregated data rate up to 480 Gbps (10 Gbps per photodetector). This paper discusses the design, process and materials integration of the prototype package, as well as the challenges encountered with respect to packaging. Results and analyses of the current prototype are also discussed. | en |
| dc.description.status | Peer reviewed | en |
| dc.description.version | Accepted Version | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Hwang, H. Y., Morrisey, P., Gazman, A., London, Y., Bergman, K. and O’Brien, P. (2019) 'Packaging design challenges of high-density high-speed silicon photonic receiver', 41st PhotonIcs & Electromagnetics Research Symposium (PIERS), Rome, Italy, 17-20 June, pp. 1-6. | en |
| dc.identifier.endpage | 6 | en |
| dc.identifier.startpage | 1 | en |
| dc.identifier.uri | https://hdl.handle.net/10468/16612 | |
| dc.language.iso | en | en |
| dc.relation.ispartof | 41st PhotonIcs & Electromagnetics Research Symposium (PIERS), Rome, Italy, 17-20 June 2019. | en |
| dc.relation.project | info:eu-repo/grantAgreement/SFI/SFI Research Centres/12/RC/2276/IE/I-PIC Irish Photonic Integration Research Centre/ | en |
| dc.rights | © 2019, the Authors. | en |
| dc.subject | 48-channels silicon photonic single mode receiver device | en |
| dc.subject | Packaging | en |
| dc.title | Packaging design challenges of high-density high-speed silicon photonic receiver | en |
| dc.type | Conference item | en |
