Low-complexity FPGA-accelerated NN-based adaptive equalizer for 100 Gb/s IMDD PON
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Accepted Version
Date
2025-09-03
Authors
Roshanshomal, Ehsan
Murphy, Stephen L.
Ayat, S. Omid
Jamali, Fariba
Townsend, Paul D.
Antony, Cleitus
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Journal ISSN
Volume Title
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Published Version
Abstract
We demonstrate a low-complexity, field-programable gate array (FPGA)-based adaptive neural network equalizer to mitigate nonlinear impairments caused by semiconductor optical amplifier (SOA) gain saturation in a 100 Gb/s intensity modulation with direct detection (IMDD) passive optical network (PON). The proposed equalizer employs a 32-tap feedforward neural network (FFNN) for multi-symbol detection. This approach incorporates both offline training and adaptive learning techniques to ensure real-time adaptability. To enhance FPGA efficiency, the model is quantized to an 8-bit fixed-point format, and the FFNN core is parallelized to achieve a 100 Gb/s throughput. Experimental results show a dynamic range of 27.8 dB and a sensitivity of -22.8 dBm. This approach improves real-time digital signal processing and establishes a foundation for future machine learning-based solutions in next-generation PON systems, addressing key performance challenges.
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Keywords
Neural network , FPGA , Equalizer , Passive optical network
Citation
Roshanshomal, E., Murphy, S. L., Ayat, S. O., Jamali, F., Townsend, P. D. and Antony, C. (2025) 'Low-complexity FPGA-accelerated NN-based adaptive equalizer for 100 Gb/s IMDD PON', 2025 IEEE International Conference on Machine Learning for Communication and Networking (ICMLCN), Barcelona, Spain, 26-29 May 2025, pp. 1-5. https://doi.org/10.1109/ICMLCN64995.2025.11140557
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