A 4th-order continuous-time ΔΣ modulator with improved clock jitter immunity using RTZ FIR DAC

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dc.contributor.authorAssom, Ian
dc.contributor.authorSalgado, Gerardo
dc.contributor.authorO'Hare, Daniel
dc.contributor.authorO'Connell, Ivan
dc.contributor.authorO'Donoghue, Keith A.
dc.contributor.funderScience Foundation Irelanden
dc.contributor.funderEuropean Regional Development Funden
dc.date.accessioned2019-05-28T08:45:18Z
dc.date.available2019-05-28T08:45:18Z
dc.date.issued2018-12
dc.date.updated2019-05-28T08:22:33Z
dc.description.abstractThis paper highlights the influence of the main feedback DAC non-idealities affecting the performance of Continuous-Time Delta-Sigma Modulators (CTDSMs) in radio receiver Internet-of-Things (IoT) applications. It proposes the combination of the Return-To-Zero (RTZ) DAC pulse and Finite-Impulse-Response (FIR) DAC to have inherent Inter-Symbol-Interference immunity and reduced clock jitter sensitivity, which is crucial to meet the strict linearity and Signal-To-Noise-Distortion-Ratio (SNDR) requirements for integrated IoT radio receivers. The proposed design is validated through MATLAB® Simulink® simulations, showing that a 4th order single-bit CTDSM with RTZ + FIR DAC can achieve an SNDR performance only 3dB below the ideal even in the presence of 4.2 ps rms of clock jitter at 24 MHz sampling frequency in a 250 kHz signal bandwidth.en
dc.description.sponsorshipScience Foundation Ireland (13/RC/207)en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationAssom, I., Salgado, G., O'Hare, D., O'Connell, I. and O'Donoghue, K. A. (2018) 'A 4th-order continuous-time ΔΣ modulator with improved clock jitter immunity using RTZ FIR DAC', 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2018), Bordeaux, France, 9-12 December, pp. 725-728. doi: 10.1109/ICECS.2018.8617899en
dc.identifier.doi10.1109/ICECS.2018.8617899en
dc.identifier.endpage728en
dc.identifier.isbn978-1-5386-9562-3
dc.identifier.isbn978-1-5386-9116-8
dc.identifier.startpage725en
dc.identifier.urihttps://hdl.handle.net/10468/7986
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.relation.ispartof25th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2018)
dc.relation.urihttps://ieeexplore.ieee.org/document/8617899
dc.rights© 2018, IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.subjectContinuous time filtersen
dc.subjectDelta-sigma modulationen
dc.subjectFIR filtersen
dc.subjectIntegrated circuit designen
dc.subjectInternet of Thingsen
dc.subjectIntersymbol interferenceen
dc.subjectJitteren
dc.subjectFourth-order single-bit CTDSMen
dc.subjectIntersymbol-interference immunityen
dc.subjectMATLAB-Simulink simulationsen
dc.subjectIntegrated IoT radio receiversen
dc.subjectFinite-Impulse-Responseen
dc.subjectContinuous-Time Delta-Sigma Modulatorsen
dc.subjectFinite impulse response filtersen
dc.subjectClocksen
dc.subjectModulationen
dc.subjectReceiversen
dc.subjectSensitivityen
dc.subjectAnalog-to-Digital Conversion (ADC)en
dc.subjectCTDSMen
dc.subjectRadio receiveren
dc.subjectClock jitteren
dc.subjectExcess Loop Delay (ELD)en
dc.subjectISIen
dc.subjectCompensationen
dc.subjectContinuous-time ΔΣ modulatoren
dc.subjectReturn-to-zero finite impulse responseen
dc.subjectRTZ FIRen
dc.subjectDACen
dc.subjectRadio receiveren
dc.titleA 4th-order continuous-time ΔΣ modulator with improved clock jitter immunity using RTZ FIR DACen
dc.typeConference itemen
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