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Dual-gate MoS2 transistors with sub-10 nm top-gate high-k dielectrics
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Supplementary Material
Date
2018-06-19
Authors
Bolshakov, Pavel
Khosravi, Ava
Zhao, Peng
Hurley, Paul K.
Hinkle, Christopher L.
Wallace, Robert M.
Young, Chadwin D.
Journal Title
Journal ISSN
Volume Title
Publisher
AIP Publishing
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Abstract
High quality sub-10 nm high-k dielectrics are deposited on top of MoS2 and evaluated using a dual-gate field effect transistor configuration. Comparison between top-gate HfO2 and an Al2O3/HfO2 bilayer shows significant improvement in device performance due to the insertion of the thin Al2O3 layer. The results show that the Al2O3 buffer layer improves the interface quality by effectively reducing the net fixed positive oxide charge at the top-gate MoS2/high-k dielectric interface. Dual-gate sweeping, where both the top-gate and the back-gate are swept simultaneously, provides significant insight into the role of these oxide charges and improves overall device performance. Dual-gate transistors encapsulated in an Al2O3 dielectric demonstrate a near-ideal subthreshold swing of ∼60 mV/dec and a high field effect mobility of 100 cm2/V·s.
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Keywords
Dielectric materials , Encapsulation , Field effect transistors , Molybdenum compounds
Citation
Bolshakov, P., Khosravi, A., Zhao, P., Hurley, P. K.; Hinkle, C. L., Wallace, R. M. and Young, C. D. (2018) 'Dual-gate MoS2 transistors with sub-10 nm top-gate high-k dielectrics', Applied Physics Letters, 112, 253502 (5pp). doi:10.1063/1.5027102
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© 2018, Article authors. This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. The following article appeared in Bolshakov, P., Khosravi, A., Zhao, P., Hurley, P. K.; Hinkle, C. L., Wallace, R. M. and Young, C. D. (2018) 'Dual-gate MoS2 transistors with sub-10 nm top-gate high-k dielectrics', Applied Physics Letters, 112, 253502 (5pp). doi:10.1063/1.5027102, and may be found at https://doi.org/10.1063/1.5027102