FPGA hardware acceleration framework for anomaly-based intrusion detection system in IoT

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dc.contributor.authorNgo, Duc-Minh
dc.contributor.authorTemko, Andriy
dc.contributor.authorMurphy, Colin C.
dc.contributor.authorPopovici, Emanuel
dc.contributor.funderScience Foundation Irelanden
dc.contributor.funderEuropean Regional Development Funden
dc.date.accessioned2022-03-16T14:35:53Z
dc.date.available2022-03-16T14:35:53Z
dc.date.issued2021-10-12
dc.date.updated2022-03-16T14:21:19Z
dc.description.abstractThis study proposes a versatile framework for realtime Internet of Things (IoT) network intrusion detection using Artificial Neural Network (ANN) on heterogeneous hardware. With the increase in the volume of exchanged data, IoT networks' security has become a crucial issue. Anomaly-based intrusion detection systems (IDS) using machine learning have recently gained increased popularity due to their generation ability to detect new attacks. However, the deployment of anomaly-based AI-assisted IDS for IoT devices is computationally expensive. In this paper, a hierarchical decision-making approach for IDS is proposed and evaluated on the new IoT-23 dataset, with improved accuracy over the software-based methods. The inference engine is implemented on the Xilinx FPGA System on a Chip (SoC) hardware platform for high performance, high accuracy attack detection (more than 99.43%). For the resulting implemented design, the processing time of the ANN model on FPGA with an xc7z020clg400 device is 6.6 times and 40.5 times faster than GPU Quadro M2000 and CPU E5-2640 2.60GHz, respectively.en
dc.description.sponsorshipScience Foundation Ireland (INSIGHT Centre for Data Analytics Grant Number 12/RC/2289-P2)en
dc.description.statusPeer revieweden
dc.description.versionAccepted Versionen
dc.format.mimetypeapplication/pdfen
dc.identifier.citationNgo, D.-M., Temko, A., Murphy, C. C. and Popovici, E. (2021) 'FPGA hardware acceleration framework for anomaly-based intrusion detection system in IoT', 2021 31st International Conference on Field-Programmable Logic and Applications (FPL), 2021, pp. 69-75. doi: 10.1109/FPL53798.2021.00020en
dc.identifier.doi10.1109/FPL53798.2021.00020en
dc.identifier.endpage75en
dc.identifier.isbn978-1-6654-4243-5
dc.identifier.isbn978-1-6654-3759-2
dc.identifier.issn1946-147X
dc.identifier.issn1946-1488
dc.identifier.startpage69en
dc.identifier.urihttps://hdl.handle.net/10468/12935
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.rights© 2021, IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.subjectAnomaly detectionen
dc.subjectFPGAen
dc.subjectIoT-23 dataseten
dc.subjectNeural networksen
dc.subjectSecurityen
dc.titleFPGA hardware acceleration framework for anomaly-based intrusion detection system in IoTen
dc.typeConference itemen
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