A study on a tether-less approach towards micro-transfer-printing of large-footprint power micro-inductor chiplets

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Pal, Somnath
Ye, Liang
O'Callaghan, James
Atar, Fatih Bilge
O'Mathuna, Cian
Corbett, Brian
Sai, Ranajit
Khan, Sambuddha
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Institute of Electrical and Electronics Engineers (IEEE)
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In recent years, need for large-scale, multi-layer, high-capacity integration for electronic systems has sky-rocketed. In this regard, a novel heterogeneous integration technique called Micro-transfer-printing (μTP) has attracted a lot of attention due to its unique ability to integrate chiplets from heterogeneous sources on to a target substrate. Typically, the chiplets are picked up from a donor substrate using an elastomer stamp by breaking the surrounding micro-tethers and then printed onto a target substrate for further processing. Despite its success in applications like sensors, photovoltaics, photonics, etc., μTP finds its limitation in handling chiplet dimensions larger than 100 x 100 x 20 μm3 . Therefore, reports on μTP of passive components like micro-inductors and micro-transformers with dimension in mm x mm and thickness of 100s of μm are non-existent. In this paper, a completely novel, non-classical, tether-less approach has been demonstrated for micro-inductors with large footprint. This paper also reports a customized PDMS stamp fabrication and optimized post-fabrication sample preparation steps, such as, substrate thinning and polishing while retaining device performance intact.
Micro-transfer-printing , μTP , Micro-inductor , Heterogeneous integration , Tether-less , Large-footprint chiplet , PDMS stamp
Pal, S., Ye, L., O'Callaghan, J., Atar, F. B., O'Mathuna, C., Corbett, B., Sai, R. and Khan, S. (2023) 'A study on a tether-less approach towards micro-transfer-printing of large-footprint power micro-inductor chiplets', 2023 IEEE International 3D Systems Integration Conference (3DIC), Cork, Ireland, 10-12 May, pp.1-4. https://doi.org/10.1109/3DIC57175.2023.10155034
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